527CHAPTER 23 STANDBY FUNCTION23.2 Standby Function Operations23.2.1 HALT mode(1) HALT mode set and operating statusThe HALT mode is set by executing the HALT instruction. It can be set with the main system clock or thesubsystem clock.The operating status in the HALT mode is described below.Table 23-1. HALT Mode Operating StatusSetting of HALT Mode On Execution of HALT Instruction during Main On Execution of HALT Instruction duringSystem Clock Operation Subsystem Clock OperationWithout subsystem With subsystem When main system clock When main systemItem clockNote 1 clockNote 1 continues oscillation clock stops oscillationClock generator Both main system and subsystem clocks can be oscillated. Clock supply to the CPU stops.CPU Operation stops.Port (output latch) Status before HALT mode setting is held.16-bit timer/event counter Operable. Operable when watchtimer output is selectedas count clock (f XT isselected as count clockof watch timer) or whenTI00 is selected.8-bit timer/event counter Operable. Operable when TI1 orTI2 is selected ascount clock.Watch timer Operable when f XX /2 7 is Operable. Operable when f XT isselected as count clock. selected as count clock.Watchdog timer Operable. Operation stops.A/D converter Operable. Operation stops.D/A converter Operable.Real-time output port Operable.Serial interface Other than Operable. Operable whenautomatic external SCK is used.transmit/receivefunctionAutomatic Operation stops.transmit/receivefunctionExternal interrupt INTP0 INTP0 is operable when clock supplied for peripheral hardware is selected Operation stops.as sampling clock (f XX /2 5 , f XX /2 6 , f XX /2 7 ).INTP1-INTP6 Operable.Bus line for AD0-AD7 High impedance.external A0-A15 Status before HALT mode setting is held.expansion ASTB Low level.WR, RD High level.WAIT High impedance.Notes 1. Including when external clock is not supplied2. Including when external clock is supplied
