User’s Manual U14826EJ5V0UD156CHAPTER 16 RESET FUNCTIONThe following three operations are available to generate reset signals.(1) External reset input by RESET signal input(2) Internal reset by watchdog timer inadvertent program loop time detection(3) Internal reset by comparison of POC circuit power supply voltage and detection voltageExternal reset and internal reset have no functional differences. In both cases, program execution starts at theaddress at 0000H and 0001H by reset signal input.When a low level is input to the RESET pin, the watchdog timer overflows, or POC circuit voltage is detected, areset is applied and each hardware is set to the status shown in Table 16-1. Each pin is high impedance during resetinput or during the oscillation stabilization time just after reset clear.When a high level is input to the RESET pin, the reset is cleared and program execution is started after theoscillation stabilization time has elapsed. The reset applied by the watchdog timer overflow is automatically clearedafter reset, and program execution is started after the oscillation stabilization time has elapsed (see Figures 16-2 to16-4).Cautions 1. For an external reset, input a low level of 10μs or more to the RESET pin.2. When STOP mode is cleared by reset, the STOP mode contents are held during reset input.However, the port pins become high impedance.Figure 16-1. Block Diagram of Reset FunctionRESETInterrupt functionCount clockReset controllerWatchdog timerPOC circuitOver-flowReset signalStop
