Contents©National Instruments CorporationxvDAQ-STC Technical Reference ManualAppendix CPin ListAppendix DDAQ-STC Revision HistoryAppendix ECustomer CommunicationGlossaryIndexFiguresFigure 1-1. Analog Input Application......................................................................1-2Figure 1-2. Analog Output Application ...................................................................1-3Figure 1-3. DAQ-STC Block Diagram ....................................................................1-4Figure 2-1. Typical Analog Input Waveform ..........................................................2-4Figure 2-2. AITM Simplified Model .......................................................................2-5Figure 2-3. ADC Control .........................................................................................2-7Figure 2-4. Configuration FIFO Control..................................................................2-8Figure 2-5. External Multiplexer Control ................................................................2-9Figure 2-6. Internal CONVERT Timing..................................................................2-10Figure 2-7. External CONVERT Timing.................................................................2-11Figure 2-8. Internal START.....................................................................................2-12Figure 2-9. External START....................................................................................2-13Figure 2-10. SI Special Trigger Delay .......................................................................2-13Figure 2-11. Posttrigger Acquisition Mode ...............................................................2-14Figure 2-12. Pretrigger Acquisition Mode .................................................................2-15Figure 2-13. Free-Run Gating Mode..........................................................................2-17Figure 2-14. Halt-Gating Mode..................................................................................2-18Figure 2-15. Single-Wire Mode .................................................................................2-18Figure 2-16. Basic Analog Input Timing ...................................................................2-86Figure 2-17. Data FIFO Timing .................................................................................2-88Figure 2-18. Configuration Memory Timing .............................................................2-89Figure 2-19. Maximum Rate Analog Input Timing ...................................................2-92Figure 2-20. External CONVERT_SRC Timing .......................................................2-93Figure 2-21. External Trigger Timing, Asynchronous Level ....................................2-94
