NUC502Apr 30, 2015 Page 59 of 266 Rev 1.17. Set SPI_CNTRL = 0x161345 for control information.8. Wait code write finish. Wait interrupt9. Set SSR register to un-select spi slave. ( no support ASS in dma mode )10. Check the BUSY status in SPI Flash6.4.6 Direct memory mapping modeUsers can see SPI flash as a ROM when in direct memory mapping mode. This controllerwill convert the AHB cycle to SPI flash without CPU setting related SPI command. The onlysetting CPU needs to do is to disable AHB master function (CNTRL[DIS_M] high), disableflash data read (CNTRL[F_DRD] low), set sleep interval to 1 (CNTRL[SLEEP] = 4’h1) and setSPI flash read command(CNTRL[SPI_MODE] 0x03, 0x0b, or 0x3b). Then users can accessSPI flash as a ROM module. Direct memory mapping mode supports these following modes:Standard Read : Set CNTRL = 0x0332_1344Fast Read : Set CNTRL = 0x0b32_1344Fast dual Read : Set CNTRL = 0x3b32_1344Note1: In direct memory mapping mode, the SPI flash IP will pre-fetch 4-wordflash data after a direct memory mapping access. If users want to change thecontrol registers (CNTRL, SSR, DIVIDER, Tx, Rx) after the direct mapping access,remember to check the busy state(GO_BUSY = 0).Note2: Sleep interval (CNTRL[SLEEP]) can’t set to zero when DIVIDER is zero.
