YASKAWA VIPA System 200V Manual

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YASKAWA VIPA System 200V Manual Manual pdf 41 page image

Manual VIPA System 200V Chapter 3 Deployment CPU 21x-2BS03HB97E - CPU - RE_21x-2BS03 - Rev. 15/16 3-3AddressingTo provide specific addressing of the installed peripheral modules, certainaddresses must be allocated in the CPU.The CPU contains a peripheral area (addresses 0 ... 1023) and a processimage of the inputs and the outputs (for both each address 0 ... 127).When the CPU is initialized it automatically assigns peripheral addresses tothe digital input/output modules starting from 0.If there is no hardware projecting, analog modules are allocated to evenaddresses starting from address 128.The signaling states of the lower addresses (0 ... 127) are additionallysaved in a special memory area called the process image.The process image is divided into two parts:• process image of the inputs (PII)• process image of the outputs (PIQ)Peripheral area0...127128...1023Process image0...1270...127InputsPIIOutputsPIQDigital modulesAnalog modulesThe process image is updated automatically when a cycle has beencompleted.You may access the modules by means of read or write operations on theperipheral bytes or on the process image.Note!Please remember that you may access different modules by means of readand write operations on the same address.The addressing ranges of digital and analog modules are different whenthey are addressed automatically.Digital modules: 0 ... 127Analog modules: 128 ... 1023AutomaticaddressingSignaling states inthe process imageRead/write access