Xilinx ML605 manuals
ML605
Table of contents
- revision history
- Table Of Contents
- Table Of Contents
- Guide Contents
- Additional Support Resources
- Overview
- Features
- Block Diagram
- Detailed Description
- Virtex-6 XC6VLX240T-1FFG1156 FPGA
- I/O Voltage Rails
- MB DDR3 Memory SODIMM
- Mb Platform Flash XL
- ML605 Flash Boot Options
- System ACE CF and CompactFlash Connector
- USB JTAG
- Clock Generation
- SMA Connectors (Differential)
- Multi-Gigabit Transceivers (GTX MGTs)
- PCI Express Endpoint Connectivity
- SFP Module Connector
- Tri-Speed Ethernet PHY
- SGMII GTX Transceiver Clock Generation
- USB-to-UART Bridge
- USB Controller
- DVI Codec
- Kb NV Memory
- Status LEDs
- Ethernet PHY Status LEDs
- FPGA INIT and DONE LEDs
- User LEDs
- User Pushbutton Switches
- User DIP Switch
- User SMA GPIO
- LCD Display (16 Character x 2 Lines)
- Switches
- FPGA_PROG_B Pushbutton SW4 (Active-Low)
- System ACE CF CompactFlash Image Select DIP Switch S1
- Mode, Osc Enable, Boot EEPROM Select, and Addr Select DIP Switch S2
- VITA 57.1 FMC HPC Connector
- VITA 57.1 FMC LPC Connector
- Power Management
- Onboard Power Regulation
- System Monitor
- Configuration Options
- connector pinout
ML605
Table of contents
- revision history
- Table Of Contents
- Table Of Contents
- about this guide
- Additional Support Resources
- additional information
- Features
- block diagram
- Electrostatic Discharge Caution
- Virtex-6 XC6VLX240T-1FFG1156 FPGA
- I/O Voltage Rails
- Mb Platform Flash XL
- ML605 Flash Boot Options
- System ACE CF and CompactFlash Connector
- USB JTAG
- clock generation
- SMA Connectors (Differential)
- Multi-Gigabit Transceivers (GTX MGTs)
- PCI Express Endpoint Connectivity
- SFP Module Connector
- Tri-Speed Ethernet PHY
- SGMII GTX Transceiver Clock Generation
- USB-to-UART Bridge
- usb controller
- DVI Codec
- Kb NV Memory
- status leds
- Ethernet PHY Status LEDs
- FPGA INIT and DONE LEDs
- user leds
- User Pushbutton Switches
- User DIP Switch
- User SMA GPIO
- LCD Display (16 Character x 2 Lines)
- Switches
- FPGA_PROG_B Pushbutton SW4 (Active-Low)
- System ACE CF CompactFlash Image Select DIP Switch S1
- Mode, Osc Enable, Boot EEPROM Select, and Addr Select DIP Switch S2
- VITA 57.1 FMC HPC Connector
- VITA 57.1 FMC LPC Connector
- power management
- Onboard Power Regulation
- system monitor
- configuration options
- Appendix A: Default Switch and Jumper Settings
- Appendix B: VITA 57.1 FMC LPC (J63) and HPC (J64) Connector Pinout
- declaration of conformity
- Safety
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