Eaton XC-CPU101 Series Instruction Leaflet

Contents

Design of the XC100 12/14 MN05003004Z-EN8Surface mountingThe voltage connection 0V Q/24VQ is only for the supply voltage tothe integral local inputs (8) and outputs (6), and is electricallyisolated from the bus.The 0V/24V voltage connection is internally filtered and bufferedand fed to a voltage transformer which generates the requiredsystem voltages. The internal power supply for the 5 V systemvoltage is designed so that the processor unit is supplied with therequired current.Table 1: Limitations which apply when using the XC100-CPU and theXIOC-Signal modules in an ABS plastic enclosureIf there is an interruption break or collapse of the 24 V supply(threshold is about 10 V) then a power-down logic switches of the5 V supply to the signal modules (central I/O). The sequence isinitiated by the PFI signal and leads to a power-down through theCPU.Local digital inputsThe 18-pole terminal block which has the power supply to theCPU, the local I/Os and the physical connection to the localinputs/outputs is located on the right half of the CPU behind thefront enclosure.The eight digital inputs and six semiconductor outputs aredesigned for 24 V signals and have a common 0VQ/24VQ powersupply which is potentially isolated right up to the bus.Local digital inputs/outputsThe outputs Q0.0 to Q0.5 can be loaded with 500 mA, a dutyfactor (ED) of 100% and a utilization factor (g) of “1”.The outputs are short-circuit proof. A short-circuit state should,however, not be permitted to exist over a longer period.Figure 3: Block diagram: power supply unita Status indicator for I/Osb Front connection terminalsc Internal filterd Buffere XIOC I/O-bus, module rackPFI = Power Fail Interrupti Caution!When using the XC100-CPU and the XIOC-Signalmodules in an ABS plastic enclosure, the limitationsstated in table 1apply. ABS enclosures are identified with“ABS” on the surface which faces the backplane.24 V0 V24 V Q0 V QEnableVCC I/O5 V H8 DI24 V HPFI5 V H3.3 V H24 V H6 DOabc deFitted in: Installationlocationinternaltemperature:Current rating of the 5 Vsystem voltage of theI/O busCI enclosure > 40 °C Use of the XC100 notpermissible0 to 40 °C max. 1.5 A 1Distributionfuse-board0 to 55 °C max. 1.5 A 1Control panel > 40 °C max. 1.5 A 10 to 40 °C max. 3.2 A1) On the outputs of the CPU made of ABS enclosure material, autilization factor g of 0.5 appliesh Limitations in performance for the digital I/O moduleswith ABS enclosures are described in the documentationfor the XIOC signal modules (MN05002002Z-EN;previously AWB2725-1452GB).h Attention! Please observe the limitations ofperformance for the outputs with ABS enclosures ina table 1.