Eaton XC-CPU101 Series Instruction Leaflet

Contents

Design of the XC100 12/14 MN05003004Z-EN10Local bus expansion with XIOC-BP-EXTThe XIOC-BP-EXT backplane enables expansion of local systembusses from a max. of 7 to a max. of 15 slots.The intelligent modules such as network and gateway modulescan only be inserted into I/O slots 1 to 3. All other modules can beconnected to any slot.The possible arrangement of the backplane is described in thedocumentation of the XIOC signal modules (MN05002002Z-EN;previously AWB2725-1452GB). Please pay attention to the currentrequirements, particularly the current supplied by the powersupply and the current requirement of the signal modules.Further information can be found in the “XIOC signal modules”(MN05002002Z-EN; previously AWB2725-1452GB)documentation. Integration of the bus expansion via the softwareis explained in the “Expansion of the XIOC bus” section.CPUThe XC-CPU101...(-XV) types of CPU are based on a processorwith an integrated CAN interface, and include battery-bufferedflash and SRAM memories. The CAN fieldbus interface iselectrically isolated. A battery is required for the operation of thedata-saving function.The monitoring of the system voltage ensures that the data-savingroutine will be initiated if the voltage goes below a fixedpreselected level. In order to ensure that the stored energyrequired for the data-saving routine is not used up by I/O activities,the 5 V system voltage for the I/O modules is switched off.The internal real-time clock facilitates time and date dependentcontrol functions.The available operating and interface control devices are:• LED display for RUN/Stop and general error• Operating-mode selector switch RUN/Stop• RS232 interface, e.g. for programming device interfacing• CANopen interface as a fieldbus interface• Interface for a multimedia memory card (MMC).The CPUs for XC100 controllers are available in various differentversions:• XC-CPU101-C64K-8DI-6DO (-XV)• XC-CPU101-C128K-8DI-6DO (-XV)• XC-CPU101-C256K-8DI-6DO (-XV)C64K, C128K and C256K are a measure for the size of the usermemory.“XV” designates a visualisation CPU, and permits the directconnection to and control of a text display (XV-101).In accordance with the size of the application program, thefollowing memory values apply:TaskThe task of the CPU is to generate output signals from theincoming local and central/decentralized signal, in accordancewith the application program.Input/output signal can be, for instance:• digital or analog signals• commands from the text display 1)• output to the text display 1)• connections to the programming system• connections to the CANopen bus interface• connections to fieldbus modules, if present• connections to intelligent signal modules, if present.1) Only with XC-CPU...-XVUse of the CPU typesh If an XC100 PLC is replaced by an XC200 PLC, theinterrupt inputs are connected to other physical inputaddresses!XC-CPU101-…(-XV)C64K-8DI-6DOC128K-8DI-6DOC256K-8DI-6DOProgram code 64 kByte 128 Kbyte 256 kByteProgram data, ofwhich:64 kByte 128 Kbyte 256 kByteMarkers 4 kByte 8 kByte 16 kByteRetain data 4 kByte 8 kByte 16 kByteThe XC-CPU...-XV types have an additional 64 kByte flash memoryfor textXC100 Text displayXV-101-…CPU types K42 K84XC-CPU101... j – –XC-CPU101…(-XV) j j j