IBM x3850 X6 Planning And Implementation Manual

Also see for System x3950 X6: Product guide Installation and service guide Product guide Installation instructions

Contents

Chapter 3. Product information 85The PCIe lanes used in the I/O Books and Storage Book are connected to installedprocessors as follows: The slots in the Primary I/O Book and Storage I/O Book connect either to processor 1 orprocessor 2. The slots in the Optional I/O Book in bay 1 connect to processor 4. The slots in the Optional I/O Book in bay 2 connect to processor 3.This PCIe connectivity is shown in Figure 3-23.Figure 3-23 Block diagram of the PCIe connectivity in the x3850 X63.12 Primary I/O BookThe Primary I/O Book is the core module, which provides base I/O connectivity, with fourPCIe slots: Two PCIe 3.0 x16 slots (x16-wired), half-length, full-height, up to 75W of power One PCIe 3.0 x16 (x8-wired), half-length, full-height, up to 75W of power One Mezzanine LOM Generation 2 (ML2) slot for network adapters with the new ML2 formfactor (PCIe 3.0 x8)As shown in Figure 3-23, the use of all slots in the Primary I/O Book requires two processors(two Compute Books) installed: Processor 1 drives a PCIe x16 slot and the ML2 slot Processor 2 drives the other PCIe 16 slot and the PCI x8 slotQPI linksIntelXeonCPU 1Slot 7: PCIe 3.0 x16 (x16)Slot 9: PCIe 3.0 x16 (x16)Slot 10: Mezz LOM (x8)Slot 12: PCIe 3.0 x16 (x8)IntelXeonCPU 2Slot 8: PCIe 3.0 x16 (x8)Slot 11: PCIe 3.0 x16 (x8)IntelXeonCPU 4IntelXeonCPU 3Slot 1Slot 2Slot 3Slot 4Slot 5Slot 6Storage BookPrimary I/O BookOptional I/O Book in Bay 2Optional I/O Book in Bay 1PCIe 3.0 lanes