CHAPTER 7 TIMER/COUNTER FUNCTION148(2) Capture/compare register n0 (CR00, CR10)CRn0 is a 16-bit register that functions as a capture register and as a compare register. Whether this registerfunctions as a capture or compare register is specified by using bit 0 (CRCn0) of the CRCn register.(a) When using CRn0 as compare registerThe value set to CRn0 is always compared with the count value of the TMn register. When the values of thetwo coincide, an interrupt request (INTTMn0) is generated. When TMn is used as an interval timer, CRn0can also be used as a register that holds the interval time.(b) When using CRn0 as capture registerThe valid edge of the TIn0 pin can be selected as a capture trigger. The valid edge for TIn0 is set by usingthe PRMn register.When the valid edge for TIn0 pin is specified as the capture trigger, refer to Table 7-2. When the valid edgefor TIn1 pin is specified as the capture trigger, refer to Table 7-3.Table 7-2. Valid Edge of TIn0 Pin and Capture Trigger of CRn0ESn01 ESn00 Valid Edge of TIn0 Pin CRn0 Capture Trigger0 0 Falling edge Rising edge0 1 Rising edge Falling edge1 0 Setting prohibited Setting prohibited1 1 Both rising and falling edges No capture operationRemark n = 0, 1Table 7-3. Valid Edge of TIn1 Pin and Capture Trigger of CRn0ESn11 ESn10 Valid Edge of TIn1 Pin CRn0 Capture Trigger0 0 Falling edge Falling edge0 1 Rising edge Rising edge1 0 Setting prohibited Setting prohibited1 1 Both rising and falling edges Both rising and falling edgesRemark n = 0, 1CRn0 is set by using a 16-bit memory manipulation instruction.The value of this register is undefined when the RESET signal is input.Caution Set CRn0 to a value other than 0000H. 1-pulse-count operation is disabled when used as anevent counter. However, if CRn0 is set to 0000H in free-running mode or in clear mode using theTIn0 valid edge, an interrupt request (INTTMn0) is generated after an overflow (FFFFH).
