CHAPTER 10 SERIAL INTERFACE FUNCTION234A start condition is output when the IIC control register (IICC0)’s bit 1 (STT) is set (to “1”) after a stop conditionhas been detected (SPD: Bit 0 = 1 in the IIC status register (IICS0)). When a start condition is detected, IICS0’sbit 1 (STD) is set (to “1”).(2) AddressesThe address is defined by the 7 bits of data that follow the start condition.An address is a 7-bit data segment that is output in order to select one of the slave devices that are connectedto the master device via bus lines. Therefore, each slave device connected via the bus lines must have aunique address.The slave devices include hardware that detects the start condition and checks whether or not the 7-bit addressdata matches the data values stored in the slave address register (SVA0). If the address data matches theSVA0 values, the slave device is selected and communicates with the master device until the master devicetransmits a start condition or stop condition.Figure 10-15. AddressAddressSCL 1SDAINTIIC0Note2 3 4 5 6 7 8 9A6 A5 A4 A3 A2 A1 A0 R/WNote INTIIC0 is not issued if data other than a local address or extension code is received during slave deviceoperation.The slave address and the eighth bit, which specifies the transfer direction as described in “(3) Transfer directionspecification” below, are together written to the IIC shift register (IIC0) and are then output. Received addressesare written to IIC0.The slave address is assigned to the high-order 7 bits of IIC0.
