CHAPTER 15 VFD CONTROLLER/DRIVER312 User’s Manual U11302EJ4V0UM15.5 Display Mode and Display OutputThe on-chip VFD controller/driver assigns pins FIP0 to FIP52/P127 to digit signals and segment signals (in thisorder). The number assigned is specified by display mode registers 0 and 1 (DSPM0 and DSPM1). The remainingpins are assigned as general-purpose ports.The pin configuration for a 14-segment display is shown below as an example.Figure 15-9. Pin Configuration for 14-Segment DisplayRemark T0 to T15: Display digit pinsS0 to S13: Segment pins...............Pin name Number of display digits selectedDisplay stopFIP0FIP1FIP2FIP3FIP4FIP5FIP6FIP7FIP8FIP9FIP10FIP11FIP12FIP13/P80FIP14/P81FIP15/P82FIP16/P83FIP17/P84FIP18/P85FIP19/P86FIP20/P87FIP21/P90FIP22/P91FIP23/P92FIP24/P93FIP25/P94FIP26/P95FIP27/P96FIP28/P97FIP29/P100FIP30/P101FIP31/P102FIP51/P126FIP52/P127FIP0FIP1FIP2FIP3FIP4FIP5FIP6FIP7FIP8FIP9FIP10FIP11FIP12P80P81P82P83P84P85P86P87P90P91P92P93P94P95P96P97P100P101P102P126P127…2…3 4 14 15 16…T0T1S0S1S2S3S4S5S6S7S8S9S10S11S12S13P83P84P85P86P87P90P91P92P93P94P95P96P97P100P101P102P126P127T0T1T2S0S1S2S3S4S5S6S7S8S9S10S11S12S13P84P85P86P87P90P91P92P93P94P95P96P97P100P101P102P126P127T0T1T2T3S0S1S2S3S4S5S6S7S8S9S10S11S12S13P85P86P87P90P91P92P93P94P95P96P97P100P101P102P126P127T0T1T2T3T4T5T6T7T8T9T10T11T12T13S0S1S2S3S4S5S6S7S8S9S10S11S12S13P97P100P101P102P126P127T0T1T2T3T4T5T6T7T8T9T10T11T12T13T14S0S1S2S3S4S5S6S7S8S9S10S11S12S13P100P101P102P126P127T0T1T2T3T4T5T6T7T8T9T10T11T12T13T14T15S0S1S2S3S4S5S6S7S8S9S10S11S12S13P101P102P126P127...............
