CHAPTER 3 CPU ARCHITECTURE55User’s Manual U11302EJ4V0UM3.1.4 Data memory addressingThe method to specify the address of the instruction to be executed next or the address of a register or memoryarea to be manipulated when an instruction is executed is called addressing.The address of the instruction to be executed next is specified by the program counter (PC) (for details, referto 3.3 Instruction Address Addressing).To address the memory area to be manipulated when an instruction is executed, theμPD780208 Subseries hasmany addressing modes to improve the operability. Especially, in the areas to which the data memory is assigned(addresses FB00H to FFFFH), the special-function registers (SFRs) and general-purpose registers can beaddressed in accordance with thier function.Data memory addressing is shown in Figures 3-6 to 3-10. For details of each addressing, refer to 3.4 OperandAddress Addressing.Figure 3-6. Data Memory Addressing (μPD780204 andμPD780204A)0000HInternal ROM32768 x 8 bitsInternal high-speed RAM1024 x 8 bitsBuffer RAM64 x 8 bitsReserved8000H7FFFHFFFFHGeneral-purpose registers32 x 8 bitsSpecial-function registers (SFRs)256 x 8 bitsFAC0HFABFHFB00HFAFFHFEE0HFEDFHFF00HFEFFHVFD display RAM80 x 8 bitsFA80HFA7FHFA30HFA2FHReservedFF20HFF1FHDirect addressingRegister indirect addressingBased addressingBased indexed addressingFE20HFE1FHSFR addressingRegister addressingShort directaddressing
