Nautel Vector-LP VR125 Technical Instruction Manual

Contents

Vector-LP Radio Beacon Transmitter Technical Instruction Manual Page 6-23 (6-24 Blank)Section 6 Theory of Operation Issue 1.16.6.1.2.2 Gate Bias Drive SignalU7, Q2 and associated componentsgenerate a 15 V square wave at 263 kHz todrive the gate bias drive in the modulator.6.6.1.2.3 Switch Mode Supply ControlDecodes the serial control (B+ settings) fromthe control/display PWB and outputs thesettings using darlington transistor U1.6.6.1.3 MODULATORSee Figure SD-22. The modulator (A5) is alogic level converter that converts the lowlevel (0 to 15 V) logic of the PDM input to ahigh level (0-B+) logic PDM (B+) output.6.6.1.3.1 13 V Power SupplyThe 15 V LO output (pin 1) of FET driver U1is full-wave rectified by bridge rectifier CR1through CR4, at the PDM frequency. Theresultant dc voltage is filtered by capacitorC7 and limited to 13 V by zener diode CR5.The power supply's less positive output isreferenced to the source terminal of powerFET Q1 via resistor R7. Therefore, thepositive output is always 13 V higher thanthe voltage on the FET source terminal. The13 V output is applied to U1’s V B (+) and V S(-) inputs as the switched gate drive for theFETs. Transformer T1 provides isolationbetween the high and low level signals.6.6.1.3.2 FET DriverFET driver U1 is an integrated circuitconfigured to produce outputs as follows: When the PDM signal applied to the HINinput is high (15 V), the H O output is the dcvoltage applied to the VB input. When the PDM signal applied to the H INinput is low (0 V), the H O output is thereference voltage applied to the V S input.The HO output, which contains the PDM data,is applied to the gate of power MOSFET Q1as its on/off control.6.6.1.3.3 B+ Switching MOSFETPower MOSFET Q1 is connected to switchthe B+ voltage at the on/off ratio of the PDMdata on U1's HO output, which is applied to itsgate. The resultant PDM (B+) output containsthe PDM data applied to J2-7 at a high (0-B+)logic level. Free-wheeling diode CR6prevents negative overshoot by providingcurrent flow when MOSFET Q1 is off.6.6.1.4 MODULATOR FILTER PWBSee Figure SD-22. The modulator filter PWB(A4) consists of inductors L1 and L2 andcapacitors C1 and C3 as well as C2 of thepower amplifier (A3). These components forma low pass filter that passes the audiocomponents but rejects the PDM frequency.When no modulating audio information ispresent, the PA Volts output will be a dcvoltage equal to the modulator input voltagemultiplied by the duty cycle of the PDM (B+)signal. Capacitor C3 in conjunction with L2 isresonant at a frequency to provide optimalrejection of the PDM frequency.6.6.1.5 POWER AMPLIFIERSee Figure SD-22. The power amplifier (A3)uses two parallel pairs of MOSFETs toproduce an unfiltered, modulated RF output.Q1 through Q4 are connected as cascode or‘H’ bridge class ‘D’ amplifiers, which switchthe PA volts at the RF drive frequency (seeFigure 6-6 for a description of class Doperation). Transformer T1 splits the RFdrive signal and applies it, through bufferamplifier U1 (fused by F1) to the MOSFETswith the required phase relationship. DiodesCR1 through CR4 prevent the output of theRF amplifier from going negative. TransistorQ5 and associated components detect theRF drive level and provide an alarm signal tothe control/display PWB. Resistors R5through R7 provide a PA Volts Sample forfront panel monitoring.6.6.1.6 RF TRANSFORMERRF transformer T1 provides impedancematching between the power amplifieroutput and the RF filter PWB.