78 www.xilinx.com AC701 Evaluation BoardUG952 (v1.4) August 6, 2019Chapter 1: AC701 Evaluation Board FeaturesConfiguration OptionsThe FPGA on the AC701 board can be configured using these methods:• Master SPI flash memory (uses the Quad SPI flash memory U7).• JTAG (uses the U26 Digilent USB-to-JTAG bridge or J4 download cable connector).See USB JTAG Module for more information.See 7 Series FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User Guide (UG480)[Ref 10] for further details on configuration modes.The method used to configure the FPGA is controlled by the mode pins (M2, M1, M0) settingselected through DIP switch SW1. Table 1-36 lists the supported mode switch settings.Figure 1-49 shows mode switch SW1.Table 1-36: Mode Switch SW1 SettingsConfigurationMode Mode Pins (M[2:0]) BusWidthCCLKDirectionMaster SPI flash memory 001 x1, x2, x4 OutputJTAG 101 x1 Not applicableX-Ref Target - Figure 1-49Figure 1-49: Mode SwitchUG952_c1_49_030615SDA03H1SBDSW1FPGA_3V3FPGA_M0FPGA_M2FPGA_M1R3391.21K0.1W1%R3381.21K0.1 W1%R3371.21K0.1W1%123654GNDONNCSend Feedback