Appendix A: Default Switch and Jumper Settings82 www.xilinx.com AC701 Evaluation BoardUG952 (v1.4) August 6, 2019Configuration DIP Switch SW1See Figure 1-2 callout 28 for location of SW1. Default settings are shown in Figure A-2 and detailsare listed in Table A-2.The default mode setting M[2:0] = 001 selects Master SPI flash memory configuration at boardpower-on.X-Ref Target - Figure A-2Figure A-2: SW1 Default SettingsTable A-2: SW1 Default Switch SettingsPosition Function Default1 FPGA_M2 M2 OFF2 FPGA_M1 M1 OFF3 FPGA_M0 M0 ONUG952_aA_02_011813SW1 OFF Position = 0ON Position = 11 2 3M2M1M0ONSend Feedback
