Xilinx SP601 User Manual

Also see for Spartan-6 FPGA Series: Getting started User guide Design and pin planning guide User guide User guide

Xilinx SP601 User Manual Manual pdf 8 page image

8 www.xilinx.com SP601 Hardware User GuideUG518 (v1.1) August 19, 2009Preface: About This GuideOnline DocumentThe following conventions are used in this document:Italic fontVariables in a syntax statementfor which you must supplyvaluesngdbuild design_nameReferences to other manuals See the User Guide for moreinformation.Emphasis in textIf a wire is drawn so that itoverlaps the pin of a symbol, thetwo nets are not connected.Dark Shading Items that are not supported orreserved This feature is not supportedSquare brackets [ ]An optional entry or parameter.However, in bus specifications,such as bus[7:0], they arerequired.ngdbuild [option_name]design_nameBraces { } A list of items from which youmust choose one or more lowpwr ={on|off}Vertical bar | Separates items in a list ofchoices lowpwr ={on|off}Angle brackets < > User-defined variable or in codesamples Vertical ellipsis...Repetitive material that hasbeen omittedIOB #1: Name = QOUT’IOB #2: Name = CLKIN’...Horizontal ellipsis . . . Repetitive material that hasbeen omittedallow block block_name loc1loc2 ... locn;NotationsThe prefix ‘0x’ or the suffix ‘h’indicate hexadecimal notationA read of address 0x00112975returned 45524943h.An ‘_n’ means the signal isactive low usr_teof_n is active low.Convention Meaning or Use ExampleConvention Meaning or Use ExampleBlue text Cross-reference link to a locationin the current documentSee the section “AdditionalResources” for details.Refer to “Title Formats” inChapter 1 for details.Blue, underlined text Hyperlink to a website (URL) Go to http://www.xilinx.comfor the latest speed files.