ZC706 Evaluation Board User Guide www.xilinx.com 37UG954 (v1.5) September 10, 2015Feature DescriptionsProcessing System Clock SourceThe Processing System (PS) clock source is a 1.8V LVCMOS single-ended fixed33.33333 MHz oscillator at U24. It is wired to PS bank 500, pin A22 (PS_CLK), on theXC7Z045 AP SoC.• Oscillator: SiTime SiT8103AC-23-18E-33.33333 (33.3 MHz)• Frequency tolerance: 50 ppm• Single-ended outputThe system clock circuit is shown in Figure 1-14.For more details, see the SiTime SiT8103 data sheet [Ref 20].GTX SMA Clock (SMA_MGT_REFCLK_P and SMA_MGT_REFCLK_N)[Figure 1-2, callout 10]The ZC706 board includes a pair of SMA connectors for a GTX clock wired to GTX Quad bank111. This differential clock has signal names SMA_MGT_REFCLK_P and SMA_REFCLK_N,which are connected to AP SoC U1 pins W8 and W7 respectively.• External user-provided GTX reference clock on SMA input connectors• Differential InputX-Ref Target - Figure 1-14Figure 1-14: Processing System Clock SourceUG954_c1_14_041113GNDVCCP1V8SiT8103Oscillator33.33333 MHz50 PPMOEGNDVCC124U24R384.7KΩ1/10W5%C3490.01 μF 25VX7R3GNDVCCP1V8OUTR17324.9Ω1/10W 1%PS CLK121 212Send Feedback
