NEC 78K/0 Series manuals
78K/0 Series
Table of contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Memory Spaces
- Special Function Register (SFR) Area
- Control Registers
- Stack pointer (SP)
- General-Purpose Registers
- General-Purpose Register Configuration
- Special Function Registers (SFRs)
- Instruction Address Addressing
- Immediate addressing
- Table indirect addressing
- Register addressing
- Operand Address Addressing
- Direct addressing
- Short direct addressing
- Special-function register (SFR) addressing
- Register indirect addressing
- Based addressing
- Stack addressing
- Operation
- Description of "operation" column
- Description of number of clocks
- Instruction Codes
- Instruction code list
- CHAPTER 5 EXPLANATION OF INSTRUCTIONS
- Bit Data Transfer Instructions
- Bit Operation Instructions
- Multiply/Divide Instructions
- Increment/Decrement Instructions
- Rotate Instructions
- BCD Adjust Instructions
- Bit Manipulation Instructions
- Call Return Instructions
- Stack Manipulation Instructions
- Unconditional Branch Instruction
- Conditional Branch Instructions
- CPU Control Instructions
- APPENDIX A REVISION HISTORY
- APPENDIX B INSTRUCTION INDEX (MNEMONIC: BY FUNCTION)
- APPENDIX C INSTRUCTION INDEX (MNEMONIC: IN ALPHABETICAL ORDER)
78K/0 Series
Table of contents
- User's Manual U16227EJ2V0UD
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- Table Of Contents
- CHAPTER 1 OUTLINE
- Applications
- Ordering Information
- Pin Configuration (Top View)
- K1 Family Lineup
- V850ES/Kx1 product lineup
- Block Diagram
- Outline of Functions
- CHAPTER 2 PIN FUNCTIONS
- Description of Pin Functions
- P10 to P17 (port 1)
- P30 to P33 (port 3)
- P120 (port 12)
- IC (mask ROM versions only)
- Pin I/O Circuits and Recommended Connection of Unused Pins
- CHAPTER 3 CPU ARCHITECTURE
- Internal program memory space
- Internal data memory space
- Data memory addressing
- Processor Registers
- General-purpose registers
- Special function registers (SFRs)
- Instruction Address Addressing
- Immediate addressing
- Table indirect addressing
- Operand Address Addressing
- Register addressing
- Direct addressing
- Short direct addressing
- Special function register (SFR) addressing
- Register indirect addressing
- Based addressing
- Based indexed addressing
- Stack addressing
- Port Functions
- Port Configuration
- Port 0
- Port 1
- Port 2
- Port 3
- Port 6
- Port 7
- Port 12
- Port 13
- Registers Controlling Port Function
- Port Function Operations
- Functions of Clock Generator
- Registers Controlling Clock Generator
- System Clock Oscillator
- When subsystem clock is not used
- Clock Generator Operation
- Time Required to Switch Between Ring-OSC Clock and X1 Input Clock
- Time Required for CPU Clock Switchover
- Clock Switching Flowchart and Register Setting
- Switching from X1 input clock to Ring-OSC clock
- Switching from X1 input clock to subsystem clock
- Switching from subsystem clock to X1 input clock
- Register settings
- CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
- Configuration of 16-Bit Timer/Event Counter 00
- Registers Controlling 16-Bit Timer/Event Counter 00
- Operation of 16-Bit Timer/Event Counter 00
- PPG output operations
- Pulse width measurement operations
- External event counter operation
- Square-wave output operation
- One-shot pulse output operation
- Cautions for 16-Bit Timer/Event Counter 00
- CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
- Configuration of 8-Bit Timer/Event Counters 50 and 51
- Registers Controlling 8-Bit Timer/Event Counters 50 and 51
- Operations of 8-Bit Timer/Event Counters 50 and 51
- Operation as external event counter
- PWM output operation
- Cautions for 8-Bit Timer/Event Counters 50 and 51
- CHAPTER 8 8-BIT TIMERS H0 AND H1
- Registers Controlling 8-Bit Timers H0 and H1
- Operation of 8-Bit Timers H0 and H1
- Operation as PWM output mode
- Carrier generator mode operation (8-bit timer H1 only)
- CHAPTER 9 WATCH TIMER
- Configuration of Watch Timer
- Watch Timer Operations
- Interval timer operation
- Cautions for Watch Timer
- CHAPTER 10 WATCHDOG TIMER
- Configuration of Watchdog Timer
- Registers Controlling Watchdog Timer
- Operation of Watchdog Timer
- Watchdog timer operation when "Ring-OSC can be stopped by software" is selected by mask option
- Watchdog timer operation in STOP mode (when "Ring-OSC can be stopped by software" is selected by mask option)
- Watchdog timer operation in HALT mode (when "Ring-OSC can be stopped by software" is selected by mask option)
- CHAPTER 11 A/D CONVERTER
- Configuration of A/D Converter
- Registers Used in A/D Converter
- A/D Converter Operations
- Input voltage and conversion results
- A/D converter operation mode
- How to Read A/D Converter Characteristics Table
- Cautions for A/D Converter
- CHAPTER 12 SERIAL INTERFACE UART0
- Configuration of Serial Interface UART0
- Registers Controlling Serial Interface UART0
- Operation of Serial Interface UART0
- Asynchronous serial interface (UART) mode
- Dedicated baud rate generator
- CHAPTER 13 SERIAL INTERFACE UART6
- Configuration of Serial Interface UART6
- Registers Controlling Serial Interface UART6
- Operation of Serial Interface UART6
- CHAPTER 14 SERIAL INTERFACE CSI10
- Registers Controlling Serial Interface CSI10
- Operation of Serial Interface CSI10
- wire serial I/O mode
- CHAPTER 15 INTERRUPT FUNCTIONS
- Registers Controlling Interrupt Functions
- Interrupt Servicing Operations
- Software interrupt request acknowledgment
- Multiple interrupt servicing
- Interrupt request hold
- CHAPTER 16 KEY INTERRUPT FUNCTION
- Register Controlling Key Interrupt
- CHAPTER 17 STANDBY FUNCTION
- Registers controlling standby function
- Standby Function Operation
- STOP mode
- CHAPTER 18 RESET FUNCTION
- Register for Confirming Reset Source
- CHAPTER 19 CLOCK MONITOR
- Register Controlling Clock Monitor
- Operation of Clock Monitor
- CHAPTER 20 POWER-ON-CLEAR CIRCUIT
- Configuration of Power-on-Clear Circuit
- Cautions for Power-on-Clear Circuit
- CHAPTER 21 LOW-VOLTAGE DETECTOR
- Registers Controlling Low-Voltage Detector
- Operation of Low-Voltage Detector
- Cautions for Low-Voltage Detector
- CHAPTER 22 MASK OPTIONS
- CHAPTER 23 µ PD78F0114
- Internal Memory Size Switching Register
- Writing with Flash Programmer
- Programming Environment
- Handling of Pins on Board
- Serial interface pins
- RESET pin
- Programming Method
- Flash memory programming mode
- Communication commands
- CHAPTER 24 INSTRUCTION SET
- Description of operation column
- Operation List
- Instructions Listed by Addressing Type
- CHAPTER 25 ELECTRICAL SPECIFICATIONS STANDARD PRODUCTS, (A) GRADE PRODUCTS)
- CHAPTER 26 ELECTRICAL SPECIFICATIONS ((A1) GRADE PRODUCTS)
- CHAPTER 27 ELECTRICAL SPECIFICATIONS ((A2) GRADE PRODUCTS)
- CHAPTER 28 PACKAGE DRAWING
- CHAPTER 29 RECOMMENDED SOLDERING CONDITIONS
- CHAPTER 30 CAUTIONS FOR WAIT
- Peripheral Hardware That Generates Wait
- Example of Wait Occurrence
- APPENDIX A DEVELOPMENT TOOLS
- A.1 Software Package
- A.3 Control Software
- A.5 Debugging Tools (Hardware)
- A.5.2 When using in-circuit emulator IE-78K0K1-ET
- A.6 Debugging Tools (Software)
- A.7 Embedded Software
- APPENDIX B NOTES ON TARGET SYSTEM DESIGN
- APPENDIX C REGISTER INDEX
- C.2 Register Index (In Alphabetical Order with Respect to Register Symbol)
- APPENDIX D REVISION HISTORY
78K/0 Series
Table of contents
- Table Of Contents
- CHAPTER 1 OUTLINE
- Applications
- Ordering Information
- Pin Configuration (Top View)
- K0/Kx2 Series Lineup
- Block Diagram
- Outline of Functions
- CHAPTER 2 PIN FUNCTIONS
- Description of Pin Functions
- AV REF
- Pin I/O Circuits and Recommended Connection of Unused Pins
- CHAPTER 3 CPU ARCHITECTURE
- Internal program memory space
- Special function register (SFR) area
- Processor Registers
- General-purpose registers
- Special function registers (SFRs)
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