CHAPTER 9 WATCH TIMERUser’s Manual U16227EJ2V0UD2089.5 Cautions for Watch TimerWhen operation of the watch timer and 5-bit counter is enabled by the watch timer mode control register (WTM) (bysetting bits 0 (WTM0) and 1 (WTM1) of WTM to 1), the interval until the first interrupt request (INTWT) is generatedafter the register is set does not exactly match the specification made with bit 3 (WTM3) of WTM. This is becausethere is a delay of one 11-bit prescaler output cycle until the 5-bit counter starts counting. Subsequently, however, theINTWT signal is generated at the specified intervals.Figure 9-4. Example of Generation of Watch Timer Interrupt Request (INTWT) (When Interrupt Period = 0.5 s)It takes 0.515625 seconds for the first INTWT to be generated (29 × 1/32768 = 0.015625 s longer). INTWT is thengenerated every 0.5 seconds.0.5 s0.5 s0.515625 sWTM0, WTM1INTWT
