CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51User’s Manual U16227EJ2V0UD 1717.4.2 Operation as external event counterThe external event counter counts the number of external clock pulses to be input to TI5n by 8-bit timer counter 5n(TM5n).TM5n is incremented each time the valid edge specified by timer clock selection register 5n (TCL5n) is input.Either the rising or falling edge can be selected.When the TM5n count value matches the value of 8-bit timer compare register 5n (CR5n), TM5n is cleared to 0and an interrupt request signal (INTTM5n) is generated.Whenever the TM5n value matches the value of CR5n, INTTM5n is generated.Setting<1> Set each register.• Set the port mode register (PM17 or PM33)Note to 1.• TCL5n: Select TI5n input edge.TI5n falling edge → TCL5n = 00HTI5n rising edge → TCL5n = 01H• CR5n: Compare value• TMC5n: Stop the count operation, select the mode in which clear & start occurs on match of TM5n andCR5n, disable the timer F/F inversion operation, disable timer output.(TMC5n = 0000××00B × = Don’t care)<2> When TCE5n = 1 is set, the number of pulses input from TI5n is counted.<3> When the values of TM5n and CR5n match, INTTM5n is generated (TM5n is cleared to 00H).<4> After these settings, INTTM5n is generated each time the values of TM5n and CR5n match.Note 8-bit timer/event counter 50: PM178-bit timer/event counter 51: PM33Figure 7-12. External Event Counter Operation Timing (with Rising Edge Specified)TI5nTM5n count valueCR5nINTTM5n00 01 02 03 04 05 N – 1 N 00 01 02 03NCount startRemark N = 00H to FFHn = 0, 1
