CHAPTER 10: THEORY OF OPERATION OVERVIEWL30 LINE CURRENT DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL 10-710Figure 10-1: Block diagram for clock synchronization in a two-terminal systemThe L30 provides sensitive digital current differential protection by computing differential current from current phasors. Toimprove sensitivity, the clocks that control current sampling are closely synchronized via the ping-pong algorithm.However, this algorithm assumes that the communication channel delay is identical in each direction. If the delays are notthe same, the error between current phasors is equal to half of the transmit-receive time difference. If the error is highenough, the relay perceives the “apparent” differential current and misoperates.For applications where the communication channel is not symmetric (for example, SONET ring), the L30 allows the use of aglobal positioning system (GPS) to compensate for the channel delay asymmetry. This feature requires a GPS receiver toprovide a GPS clock signal to the L30. With this option there are two clocks at each terminal: a local sampling clock and alocal GPS clock. The sampling clock controls data sampling while the GPS clock provides an accurate, absolute timereference used to measure channel asymmetry. The local sampling clocks are synchronized to each other in phase and tothe power system in frequency. The local GPS clocks are synchronized to GPS time using the externally provided GPS timesignal.GPS time stamp is included in the transmitted packet along with the sampling clock time stamp. Both sampling clockdeviation and channel asymmetry are computed from the four time stamps. One half of the channel asymmetry is thensubtracted from the computed sampling clock deviation. The compensated deviation drives the phase and frequency lockloop (PFLL) as shown in the previous figure. If GPS time reference is lost, the channel asymmetry compensation is notenabled, and the relay clock can start to drift and accumulate differential error. In this case, the 87L function has to beblocked. See the Application of Settings for examples of how to program the relay.10.1.10 Frequency detectionEstimation of frequency deviation is done locally at each relay based on rotation of positive sequence current, or onrotation of positive sequence voltage, if it is available. The counter clockwise rotation rate is proportional to the differencebetween the desired clock frequency and the actual clock frequency. With the peer-to-peer architecture, there isredundant frequency tracking, so it is not necessary that all terminals perform frequency detection.
