NEC IMAGE P100E Service Manual

Also see for IMAGE P100E - SERVICE: Manual

Contents

Technical Information 1-13Real-Time Clock (RTC)The computer uses a Benchmarq bq4287 RTC module with non-volatile RAM control. Thebq4287 resides on the XD bus and provides a time-of-day clock and a 100-year calendarwith alarm features and battery operation. The battery life is approximately 6 years whendriving an SRAM that draws 2 microamperes when off and the computer is off 2/3 of theday. For further information, refer to the Benchmarq bq4287 data sheet.System I/O ControllerThe computer uses the SMC FDC37C665 I/O system I/O controller to provide a floppydisk controller, a digital data separator, two 16550 compatible UARTS, and an enhancedbidirectional parallel port. The computer supports extended capabilities port (ECP),enhanced parallel port (EPP), and ZIPPY protocols.The I/O controller provides control for up to two diskette/tape drives. The followingdevices are supported:n 5 1/4-inch 360 KB diskette driven 5 1/4-inch 1.2 MB diskette driven 3 1/2-inch, 720 KB diskette driven 3 1/2-inch, 1.44 MB diskette driven 3 1/2-inch 2.88 MB diskette driveThe capacity of 3 1/2 inch diskette drives is sensed automatically. The existence of anEISA floppy controller is also automatically sensed. If the BIOS detects an EISA floppycontroller, the on-board floppy controller is disabled. The on-board floppy controller canalso be disabled via Setup (for diskless workstations). However, if there is no bootabledevice available, the system BIOS will attempt to boot from the built-in floppy even if theon-board floppy controller is disabled via Setup. This provides a bootable system in theevent that the CMOS is corrupted.I/O MappingThe processor communicates with I/O devices by I/O mapping. There are a large number ofI/O ports implemented in the system associated with the keyboard controller, system I/Ocontroller, and Neptune II chipset. The hexadecimal (hex) addresses of I/O devices used bythe Image P90E and Image P100E are listed in Table Section 1-4. For a description of thechipset configuration registers, see the following subsection.The I/O ports implemented by the system I/O controller are not listed. Refer to the SMCFDC37C665 data sheets for a detailed description of the system I/O controller ports. Inaddition, keyboard controller registers (with the exception of the keyboard status register)are documented in the NEC PS/2 Style Keyboard Controller release notes.