1-22 Technical InformationInterrupt ControllerThe interrupt controller is implemented on the EISA system component (ESC) andoperates as an interrupt manager for the entire system environment. The controller acceptsrequests from peripherals, issues interrupt requests to the processor, resolves interruptpriorities, and provides vectors for the processor to determine which interrupt routine toexecute. The interrupt controller has priority assignment modes that can be reconfigured atany time during system operations.The interrupt levels are listed in Table Section 1-5. Interrupt-level assignments 0 through15 are in order of decreasing priority. See Section 2, Setup and Configuration, forinformation on changing the interrupts using Setup.Table Section 1-5 Interrupt Level AssignmentsInterrupt Priority Interrupt DeviceIRQ00 Counter/TimerIRQ01 KeyboardIRQ02 Cascade (INT output from slave)IRQ03 COM2*IRQ04 COM1*IRQ05 LPT2*IRQ06 Diskette Drive Controller*IRQ07 Parallel Port 1*IRQ08 Real-time clockIRQ09 AvailableIRQ10 AvailableIRQ11 AvailableIRQ12 PS/2 mouse*IRQ13 CoprocessorIRQ14 Primary IDEIRQ15 Secondary IDE*Industry standard locations
