Xilinx RocketIO User Manual

Also see for RocketIO: User guide User guide User guide

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Xilinx RocketIO User Manual Manual pdf 93 page image

RocketIO™ Transceiver User Guide www.xilinx.com 93UG024 (v3.0) February 22, 2007Other Important Design Notes ROther Important Design NotesReceive Data Path 32-bit AlignmentThe RocketIO transceiver uses the attribute ALIGN_COMMA_MSB to align protocoldelimiters with the use of comma characters (special K-characters K28.5, K28.1, and K28.7for most protocols). Setting ALIGN_COMMA_MSB to TRUE/FALSE determines wherethe comma characters appear on the RXDATA bus. When ALIGN_COMMA_MSB is set toFALSE, the comma can appear in any byte lane of RXDATA in the 2- and 4-byte primitives.When ALIGN_COMMA_MSB is set to TRUE, the comma appears in RXDATA[15:8] for the2-byte primitives, and in either RXDATA[15:8] or RXDATA[31:24] for the 4-byte primitives.(See “ALIGN_COMMA_MSB,” page 67.)In the case of a 4-byte primitive, the transceiver sets comma alignment with respect to its2-byte internal data path, but it does not constrain the comma to appear only inRXDATA[31:24]. Logic must be designed in the FPGA fabric to handle comma alignmentfor the 32-bit primitives when implementing certain protocols. (Note that FPGA logic is notrequired for 1-byte and 2-byte configurations.)One such protocol is Fibre Channel. Delimiters such as IDLES, SOF, and EOF are four byteslong, and are assumed by the protocol logic to be aligned on a 32-bit boundary. The FibreChannel IDLE delimiter is four bytes long and is composed of characters K28.5, D21.4,D21.5, and D21.5. The comma, K28.5, is transmitted in TXDATA[31:24], which the protocollogic expects to be received in RXDATA[31:24].Using Table B-1, page 135, and Table B-2, page 143, the IDLE delimiter can be translatedinto a hexadecimal value 0xBC95B5B5 that represents the 32-bit RXDATA word. On the32-bit RXDATA interface, the received word is either 32-bit aligned or misaligned, asshown in Table 2-24. In the table, “pp” indicates a byte from a previous word of data.Figure 2-28: Serial and Parallel Loopback LogicTXDATARXDATATXP/TXNRXP/RXNTX PCS TX SERIALIZERRX DESERIALIZERRX PCS MUXMUXPARALLELLOOPBACK = 01SERIALLOOPBACK = 10UG024_25_110503Product Not Recommended for New Designs