Xilinx SP605 Hardware User's Manual Manual pdf 30 page image
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Xilinx SP605 Hardware User's Manual

Also see for SP605: Hardware TutorialUser guideHardware setup guide

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Contents
  1. Revision History
  2. Table Of Contents
  3. Table Of Contents
  4. Guide Contents
  5. Additional Support Resources
  6. Overview
  7. Features
  8. Block Diagram
  9. Related Xilinx Documents
  10. Detailed Description
  11. Spartan-6 XC6SLX45T-3FGG484 FPGA
  12. I/O Voltage Rails
  13. SPI x4 Flash
  14. Linear BPI Flash
  15. FPGA Design Considerations for the Configuration Flash
  16. USB JTAG
  17. Clock Generation
  18. Oscillator Socket (Single-Ended, 2.5V or 3.3V)
  19. SMA Connectors (Differential)
  20. PCI Express Endpoint Connectivity
  21. SFP Module Connector
  22. Tri-Speed Ethernet PHY
  23. USB-to-UART Bridge
  24. DVI CODEC
  25. IIC External Access Header
  26. Status LEDs
  27. Ethernet PHY Status LEDs
  28. FPGA INIT and DONE LEDs
  29. User I/O
  30. User Pushbutton Switches
  31. User DIP Switch
  32. User SIP Header
  33. User SMA GPIO
  34. Switches
  35. FPGA_PROG_B Pushbutton SW3 (Active-Low)
  36. System ACE CF CompactFlash Image Select DIP Switch S1 (Active-High)
  37. Mode DIP Switch SW1 (Active-High)
  38. VITA 57.1 FMC LPC Connector
  39. Power Management
  40. Onboard Power Regulation
  41. Configuration Options
  42. Appendix A: Default Jumper and Switch Settings
  43. Appendix B: VITA 57.1 FMC LPC Connector Pinout
  45. CE Directives
  46. Markings
Xilinx SP605 Hardware User's Manual Manual pdf 30 page image
30 www.xilinx.com SP605 Hardware User GuideUG526 (v1.9) February 14, 2019Chapter 1: SP605 Evaluation BoardTable 1-10: GTP SMA Clock ConnectionsU1 FPGA Pin Schematic Net Name SMA PinC9 SMA_RX_N J35.1D9 SMA_RX_P J34.1A8 SMA_TX_N J33.1B8 SMA_TX_P J32.1D11 SMA_REFCLK_N J36.1C11 SMA_REFCLK_P J37.1
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SP605
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