Xilinx SP605 Hardware User's Manual

Also see for SP605: Hardware Tutorial User guide Hardware setup guide

Contents

34 www.xilinx.com SP605 Hardware User GuideUG526 (v1.9) February 14, 2019Chapter 1: SP605 Evaluation Board11. 10/100/1000 Tri-Speed Ethernet PHYThe SP605 uses the onboard Marvell Alaska PHY device (88E1111) for Ethernetcommunications at 10, 100, or 1000 Mb/s. The board supports a GMII interface from theFPGA to the PHY. The PHY connection to a user-provided Ethernet cable is through a HaloHFJ11-1G01E RJ-45 connector with built-in magnetics.On power-up, or on reset, the PHY is configured to operate in GMII mode with PHYaddress 0b00111 using the settings shown in the following table. These settings can beoverwritten via software commands passed over the MDIO interface.Table 1-15 shows the connections and pin numbers for the PHY.Table 1-14: PHY Configuration PinsPin Connection onBoardBit[2]Definition and ValueBit[1]Definition and ValueBit[0]Definition and ValueCFG2 VCC 2.5V ANEG[3] = 1 ANEG[2] = 1 ANEG[1] = 1CFG3 VCC 2.5V ANEG[0] = 1 ENA_XC = 1 DIS_125 = 1CFG4 VCC 2.5V HWCFG_MD[2] = 1 HWCFG_MD[1] = 1 HWCFG_MD[0] = 1CFG5 VCC 2.5V DIS_FC = 1 DIS_SLEEP = 1 HWCFG_MD[3] = 1CFG6 PHY_LED_RX SEL_BDT = 0 INT_POL = 1 75/50Ω = 0Table 1-15: Ethernet PHY ConnectionsU1 FPGA Pin Schematic Net Name U46 M88E111Pin Number Pin NameV20 PHY_MDIO 33 MDIOR19 PHY_MDC 35 MDCJ20 PHY_INT 32 INT_BJ22 PHY_RESET 36 RESET_BN15 PHY_CRS 115 CRSM16 PHY_COL 114 COLP20 PHY_RXCLK 7 RXCLKU20 PHY_RXER 8 RXERT22 PHY_RXCTL_RXDV 4 RXDVP19 PHY_RXD0 3 RXD0Y22 PHY_RXD1 128 RXD1Y21 PHY_RXD2 126 RXD2W22 PHY_RXD3 125 RXD3W20 PHY_RXD4 124 RXD4V22 PHY_RXD5 123 RXD5V21 PHY_RXD6 121 RXD6