114 www.xilinx.com Spartan-3E Starter Kit Board User GuideUG230 (v1.0) March 9, 2006Chapter 15: Expansion Connectors RThree signals are reserved primarily as clock signals between the board and FX2 connector,although all three connect to full I/O pins.Voltage Supplies to the ConnectorThe Spartan-3E Starter Kit board provides power to the Hirose 100-pin FX connector andany attached board via two supplies (see Figure 15-2). The 5.0V supply provides a voltagesource for any 5V logic on the attached board or alternately provides power to any voltageregulators on the attached board.A separate supply provides the same voltage at that applied to the FPGA’s I/O Bank 0. AllFPGA I/Os that interface to the Hirose connector are in Bank 0. The I/O Bank 0 supply is3.3V by default. However, the voltage level can be changed to 2.5V using jumper JP9. SomeFPGA I/O standards—especially the differential standards such as RSDS and LVDS—require a 2.5V output supply voltage.To support high-speed signals across the connector, a majority of pins on the B-side of theFX2 connector are tied to GND.Connector Pinout and FPGA ConnectionsTable 15-1 shows the pinout for the Hirose 100-pin FX2 connector and the associated FPGApin connections. The FX2 connect has two rows of connectors, both with 50 connectionseach, shown in the table using light yellow shading.Table 15-1 also highlights the shared connections to the eight discrete LEDs, the three 6-pinAccessory Headers (J1, J2, and J4), and the connectorless debugging header (J6).Figure 15-2: FPGA Connections to the Hirose 100-pin Edge ConnectorHirose 100-pin ExpansionConnector (J3)(See Table) FX2_IO<34:1>Spartan-3E FPGAFX2_IP<38:35>(See Table)FX2_IO<39>5.0V(E10) FX2_CLKIN(D10) FX2_CLKOUT(D9) FX2_CLKIO(See Table)(See Table)(B.46)(A.47)(B.48)GND3.3V2.5VBank 0 Supply(JP9)FX2_IP<40>(C15)(C3)(A.45)(A.44)UG230_c12_02_022406
