126 www.xilinx.com Spartan-3E Starter Kit Board User GuideUG230 (v1.0) March 9, 2006Chapter 16: XC2C64A CoolRunner-II CPLD RFigure 16-1: XC2C64A CoolRunner-II CPLD Controls Master Serial and BPI Configuration Modes(N18)Spartan-3E FPGA(P29)(P18)XC_CMD<1>XC_CMD<0>XC2C64A VQ44CoolRunner-II CPLD(P30)XC_D<2>XC_D<1>XC_D<0>(P36)(P34)(P33)(P8)(P6)(F17)(F18)(G16)(T10)(V11)FPGA_M2FPGA_M1(P5)(M10) FPGA_M0XC_CPLD_ENXC_TRIG(P42)(P41)(D10)(R17)XC_DONE (P40)DONEXC_PROG_B (P39)PROG_BXC_GCK0 (P43)GCLK10(H16)(C9) (P1)SPI_SCK (P44)(U16)(P23)(P22)(P21)(P20)(P19)(FX2_IO<32>)SF_A<23>SF_A<22>SF_A<21>SF_A<20>3.3V(P16)XC_WDT_EN(A11)(N11)(V12)(V13)(T12)(P2) XC_PF_CEXCF04SPlatform Flash PROMCEIntel StrataFlashJP10WDT_ENA[19:0] A[19:0]A[24:20]During Configuration:BPI Up: A[24:20]=00000BPI Down: A[24:20]=11111After Configuration or Other Modes:A[24:20]=ZZZZUpper Ad dressControl DuringCon figurationRequired for Master Serial ModeEnable Platform Flash PROM whenM[2:0]=000A[23:20] A[23:20] UnconnectedSF_A<19:0>UG230_c16_01_030906SF_A<24>
