162 www.xilinx.com Virtex-6 FPGA GTX Transceivers User GuideUG366 (v2.5) January 17, 2011Chapter 3: TransmitterTX Pattern GeneratorFunctional DescriptionPseudo-random bit sequences (PRBS) are commonly used to test the signal integrity ofhigh-speed links. These sequences appear random but have specific properties that can beused to measure the quality of a link. The GTX transceiver pattern generator block cangenerate several industry-standard PRBS patterns listed in Table 3-22.In addition to PRBS patterns, the GTX transceiver supports 20 UI (or 16 UI) and 2 UIsquare wave test patterns and PCI Express compliant pattern generation. Clocking patternis usually used to check PLL random jitter often done with a spectrum analyzer.Error insertion function is supported to verify link connection and also for jitter tolerancetest. When inverted PRBS pattern is necessary, use TXPOLARITY signal to control polarity.Table 3-22: Supported PRBS PatternName Polynomial Length of Sequence DescriptionsPRBS-7 1 + X6 + X 7 27 – 1 bits Used to test channels with 8B/10B.PRBS-15 1 + X 14 + X 15 215 – 1 bits ITU-T Recommendation O.150, Section 5.3. PRBS-15 is oftenused for jitter measurement as it is the longest pattern theAgilent DCA-J sampling scope can handle.PRBS-23 1 + X 18 + X 23 223 – 1 bits ITU-T Recommendation O.150, Section 5.6. PRBS-23 is oftenused for non-8B/10B encoding scheme. One of therecommended test patterns in the SONET specification.PRBS-31 1 + X 28 + X 31 231 – 1 bits ITU-T Recommendation O.150, Section 5.8. PRBS-31 is oftenused for non-8B/10B encoding scheme. A recommended PRBStest pattern for 10 Gigabit Ethernet. See IEEE 802.3ae-2002.Table 3-23: PCI Express Compliance PatternSymbol K28.5 D21.5 K28.5 D10.2Disparity 0 1 1 0Pattern 0011111010 1010101010 1100000101 0101010101X-Ref Target - Figure 3-24Figure 3-24: 20 UI Square WaveUG366_c3_14_05150920 UIwww.BDTIC.com/XILINX
