ML610Q174 User’s ManualChapter 10 PWMFEUL610Q174-01 10-5310.3.7.3 External Input Start ModeWith the setting of PnSTM1="1" and PnSTM0="0" on the PWMn control register 2 (PWnCON2), the PWMcounter operates being controlled by the edge of the external input (P00/PW45EV0 or P30/PW45EV1 orP01/PW6EV0 or P31/PW6EV1 pin) that is selected by the PnTGSEL bit of the PWMn control register 2(PWnCON2).Note that the PnRUN bit is set to "1" in advance. If the PnRUN bit is "0", PWM will not operates even when theedge input occurs on the selected external input.Figure 10-9 shows the operation timing.(a) Operation Timing Diagram with External Input StartPnTGE1=0, PnTGE0=1When rising-edge start and falling-edge stop & clear are selectedPWnCH/LP00/PW45EV0orP30/PW45EV1PnRUNCount upT PWPCounting stoppedExternal inputstop & clear0000 Count up 0000 Count upExternal input startExternal input startCounting stoppedExternal inputaccept enabledPWnPH/L 8000 2000PWnPBUF 8000 2000PWnDH/L 4000 1000PWnDBUF 1000SFR write from CPU Update buffer register400080004000SFR writefrom CPU80004000Update buffer register0000PWMn outputThe PnINI bit allows selectionof the "H/L" level for the PWMinitial value.0000 Count upCoincidence of the PWnCH/CL count valueand period buffer (PWnPBUF) value
