ML610Q174 User’s ManualChapter 3 Reset FunctionFEUL610Q174-01 3-23.2 Description of Registers3.2.1 List of RegistersAddress Name Symbol (Byte) Symbol (Word) R/W Size Initial value0F001H Reset status register RSTAT － R/W 8 ―3.2.2 Reset Status Register (RSTAT)Address：0F001HAccess：R/WAccess size：8 bitsInitial value：Undefined7 6 5 4 3 2 1 0RSTAT ― ― ― ― ― WDTR ― ―R/W R R R R R R/W R RInitial value 0 0 0 0 0 0 0 xRSTAT is a special function register (SFR) that indicates the causes by which the reset is generated.At the occurrence of reset, the contents of RSTAT are not initialized, while the bit indicating the cause of the reset isset to ”1”. When checking the reset cause using this function, perform write operation to RSTAT in advance andinitialize the contents of RSTAT to “00H”.[Description of Bits]• WDTR (bit 2)The WDTR is a flag that indicates that the watchdog timer reset is generated. This bit is set to “1” when the reset byoverflow of the watchdog timer is generated.WDTR Description0 Watchdog timer reset not occurred1 Watchdog timer reset occurredNote:No flag is provided that indicates the occurrence of reset by the RESET_N pin.
