ML610Q174 User’s ManualChapter 1 OverviewFEUL610Q174 1-91.3.3 Pin DescriptionTable 1-2 shows the pin description.In the I/O column, “—” denotes an input pin, “I” an input pin, “O” an output pin, and “I/O” an input/output pin.Table 1-2 Pin DescriptionPin name I/O DescriptionPrimary/SecondaryLogicPower supplyVSS — Negative power supply pin — —VDD — Positive power supply pin — —VDDL — Positive power supply pin for internal logic (internally generated). Connectcapacitors (CL ) (see Measuring Circuit 1) between this pin and VSS . — —VL1 — Power supply pins for LCD bias (external input). This function is allocatedto the primary function of the P84 pin. — —VL2 — Power supply pins for LCD bias (external input). This function is allocatedto the primary function of the P85 pin. — —VL3 — Power supply pins for LCD bias (external input) — —TestTEST0 I/O Input/output pin for testing. This pin has a pull-down resistor built in. — PositiveTEST1_N I/O Input/output pin for testing. This pin has a pull-up resistor built in. — NegativeSystemRESET_N IReset input pin. When this pin is set to a “L” level, the device is placed insystem reset mode and the internal circuit is initialized. If after that this pinis set to a “H” level, program execution starts. This pin has a pull-upresistor built in.— NegativeXT0 I Crystal connection pin for low-speed clock. A 32.768 kHz crystal oscillator(see measuring circuit 1) is connected to this pin. Capacitors CDL and CGLare connected across this pin and VSS as required.— —XT1 O — —OSC0 I Crystal/ceramic connection pin for high-speed clock.A 8MHz crystal or ceramic is connected to this pin. Capacitors CDH andCGH (see measuring circuit 1) are connected across this pin and VSS.— —OSC1 O — —LSCLK O Low-speed clock output. This function is allocated to the secondaryfunction of the P20/P36 pin. Secondary —OUTCLK O High-speed clock output. This function is allocated to the secondaryfunction of the P21 pin. Secondary —
