CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)User’s Manual U16896EJ2V0UD 1376.3 ConfigurationTMP0 includes the following hardware.Table 6-1. Configuration of TMP0Item ConfigurationTimer register 16-bit counterRegisters TMP0 capture/compare registers 0, 1 (TP0CCR0, TP0CCR1)TMP0 counter read buffer register (TP0CNT)CCR0, CCR1 buffer registersTimer inputs 2 (TIP00Note, TIP01 pins)Timer outputs 2 (TOP00, TOP01 pins)Control registers TMP0 control registers 0, 1 (TP0CTL0, TP0CTL1)TMP0 I/O control registers 0 to 2 (TP0IOC0 to TP0IOC2)TMP0 option register 0 (TP0OPT0)Note The TIP00 pin functions alternately as a capture trigger input signal, external event count inputsignal, and external trigger input signal.Figure 6-1. Block Diagram of TMP0fXXfXX/2f XX/4f XX/8f XX/16f XX/32f XX/64f XX/128SelectorInternal busInternal busTOP00TOP01TIP00TIP01SelectorCCR0bufferregister CCR1bufferregisterTP0CCR0TP0CCR116-bit counterTP0CNTINTTP0OVINTTP0CC0INTTP0CC1OutputcontrollerClearEdgedetectorEdgedetectorDigitalnoiseeliminatorRemark f XX : Main clock frequency
