R76-/R76-2OKIFAX 5700/5900 A3 - 1A3.1 MCNTA3.1.1 CPUA3.1.1.1 FunctionsA 32-bit RISC CPU is used as a core and it is provided with the following peripheral func-tions:• Built-in PROM/Mask ROM• Built-in RAM• Bus state controller (DRAM control and chip select creation)• Interrupt controller• DMA controller• 16-bit timer pulse unit• Serial communication interface(1) CPU’s throughputThe basic clock frequency is 20 MHz. A program/data is stored in the built-in ROM/RAM. The rated throughput is 20 MIPS when optimum object code has been cre-ated. However, the actual throughput is reduced due to the access times needed byexternal devices.(2) Built-in PROM/Mask ROMThe built-in ROM size is 64 KB and memory addresses range from 000000h to000FFFh.(3) Built-in RAMThe built-in RAM size is 4 KB and memory addresses range from FFFF000h toFFFFFFFh.(4) Bus state controllerThe bus state controller controls the DRAM and accesses the flash ROM andexternal devices.(Figure 6.1 shows the timing chart of the basic bus cycle.)(5) Interrupt controllerThis system has nine interrupts. Three interrupts /IRQ 4, /IRQ6, and /IRQ7 are usedbut the other six interrupts /IRQ0 to /IRQ3, IRQ5, and NMI are not used.Interrupts are allocated as follows:/IRQ7 = Print-related user timer interrupt/IRQ6 = Matsushita V.34 modem interrupts 1and 2, Sanyo V.17 modem, encryption,line ringing tone (Ring), Sanyo read control IC/IRQ4 = Centronics I/F controller interrupt, JBIG chip interrupt, MUPIS I/F, power I/F,second tray I/F, user DMA channel 4/5 (Centronics), use DMA channel 6/7(JBIG)
