Philips BJ2.4U Service Manual

Circuit Descriptions, Abbreviation List, and IC Data Sheets EN 133BJ2.4U/BJ2.5U PA 9.9.8 PNX2015: AVIP9.8.1 IntroductionThe AVIP (Audio Video Input Processor) receives the digitaldata via the I2 D link (coming from MPIF). It reformats this dataand maps (synchronizes) the data to the clock of the AVIP.Then a digital AGC is passed. After this, the video decoding isperformed in the VIDDEC-block of the AVIP. The decodedvideo is sent to an output block, which formats the data to anITU-656 compatible standard data stream.The AVIP power supply is 1.2 V and 3.3 V. To ensuresynchronization of video streams processed across the VIPERand PNX2015 devices, a 27 MHz is coming from the VIPER.The AVIP is I 2 C driven.Initialization of this IC begins with a hard reset (MIPS-RESET)provided by the VIPER. Besides video decoding, the AVIP isalso used for decoding and presentation of all audio outputstreams in the system.9.8.2 Block DiagramsBelow the main functions and features in the AVIP for videoand audio are given.Figure 9-18 AVIP block diagramMain AVIP function:• I 2 D receiver.• Color decoding into ITU-601 compatible format (1fH/2fH).• Interface with 3D comb filter (called Columbus in thischassis).• VBI data capture via DCU (Teletext, CC, etc.).• ITU-656 formatting.• Audio demodulation and decoding via DEMDEC.• Audio processing and D/A conversion.I 2 D ReceiverFigure 9-19 I 2 D receiver block diagramThe receiver block gets the serial data stream and converts itto a parallel stream. This parallel data is fed to the "de-multiplexer and formatter " block where the selected audio/video stream is forwarded to the video and audio decoder forfurther processing. This communication bus is completelydigital and very difficult to monitor.The I2 D link has the following characteristics.• The data-link runs at 297 MHz / 594 Mbps.• The driver rise/fall time is around 200 ps.• The data-link uses differential signals.VIDDEC (Video Decoder)Figure 9-20 VIDDEC block diagramThe CVBS/YC/YUV signals (coming from the I2 D receiverblock) enter the DMSD block (Digital Multi Standard Decoder)via the AGC (Automatic Gain Control) block. The multiplexerblock (MUX) takes care of the correct output signal. The syncsignals are processed in the sync block.The VIDDEC has the following main functions:• Multi standard color decoder.• Automatic system recognition.• Fully programmable static or automatic (AGC) for allanalog video base band signals.• AGC on sync amplitude in digital domain.• Selectable peak white control.• AGC for chrominance (PAL and NTSC only).• Programmable Luminance and Chrominance bandwidthfor CVBS and Y/C sources.• Programmable clamp window for the selected video baseband signals.• Digital PLL for synchronization on 2fH and ATSCstandards.• Horizontal (including 3-level sync for 2fH) and vertical syncdetection.• Automatic detection of 50/60Hz ATSC field frequency.• Adaptive 2/4-line delay comb filter for two-dimensionalChrominance/Luminance separation.• Copy protected source detection according to MacroVisionup to version 7.01• Possibility of RGB insertion through fast blanking in CVBSinput mode, not in Y/C.E_14700_069.eps310505I2DVIDDECDCUDemDecITU-656I2D1I2D2I2D3CVBS/YC/YUVSIF or L/RI2Sout I2SInITU-656Cvbs_yycVBI bytesLRGPAudioProcessingE_14700_070.eps300505I2DtransmitterI2DreceiverL1/R1YUV/ UVyuvSIFCVBSsecL2/R2CVBSpri /YC/YyuvI2DtransmitterI2DtransmitterI2DreceiverI2DreceiverI2D transmitter I2D AVIPL2/R2L1/R1SIFCVBSpri /YycYyuv / C ycUVyuvCVBSsec/rexelpitlumedoedivrettamrof/rexelpitlumedoiduarettamrofVAL1VAL3VAL2 VALE_14700_071.eps021104Video DecoderDigital MultiStandard Decoder(DMSD)AGCsyncmux(Fast blank)UyuvSyncCVBS/YycYuv/CycUyuvVyuvVsync2Vsync1FBL1/Hsync1FBL2/Hsync2YycCycYUVYUVHVsyncFBL2FBL1VyuvYuv