|
Service Modes, Error Codes, and Fault FindingEN 30 BJ2.4U/BJ2.5U PA5.Figure 5-16 “Semi Stand-by” to “Stand-by” flowchartG_15960_133.eps100306action holder: MIPSautonomous actionaction holder: St-bytransfer Wake up reasons to theStand by μP.Images are re-transferred to DDR-RAM fromFlash RAM (verification through checksum)Stand bySemi Stand byMIPS image completes the application reload,stops DDR-RAM access, puts itself in asleepmode and signals the standby μP when thestandby mode can be entered.Disable all supply related protections and switch offthe +2V5, +3V3 DC/DC converter.DDR-RAM is put in self refresh mode and the imagesare kept in the hibernating DDR-RAM.Switch OFF all supplies by switching HIGH the POD-MODE and the ON-MODE I/O lines.Switch Viper in reset stateImportant remark:release reset audio and sound-enable 10 sec after enteringstandby to save powerswitch off the remaining DC/DC convertersWait 5msWait 5msFor PDP this means CPUGObecomes low.Wait 10msSwitch the NVM reset line HIGH.Delay transition until ramping down of ambient light isfinished. *)Switch ambient light to passive mode with RGBvalues on zero. *)*) If this is not performed and the set isswitched to standby when the ramping ofthe EPLD is still ongoing, the lights willremain lit in standby. PreviousNext |