RocketIO™ X Transceiver User Guide www.xilinx.com 147UG035 (v1.5) November 22, 2004 1-800-255-7778RAppendix CPMA Attribute Programming BusThe RocketIO X transceivers provide a simple, parallel programming bus for dynamicallyconfiguring the PMA attribute settings. This gives the end user real-time control of PMAfeatures without the need to use partial reconfiguration or to bring out discrete controlports to the fabric for each and every attribute (not feasible).Note:1. This feature is for ADVANCED USERS ONLY. Direct modification of these attributesshould only be done with a thorough understanding of the capabilities, performance,and side-effects of the resulting settings. For most applications, the default PMAattribute settings provided in the software primitives should be adequate.2. The attribute bus is not user accessible during normal FPGA configuration or aPMAINIT cycle (internally controlled for PMA initialization). Control is passed backto the fabric TBD ms after initialization.3. The previous bitstream configuration settings of the PMA attributes are restored afterassertion of PMAINIT and the subsequent initialization cycle, thus overwriting anymodifications via the attribute programming bus.Interface DescriptionThe PMA attribute programming bus consists of a simple, strobed, byte-wide interface.The user accessible ports are defined in Table C-1. During FPGA configuration or aPMAINIT cycle, these ports have no effect on PMA attributes.Table C-1: PMA Attribute Bus PortsPort DescriptionPMAREGADDR[5:0] Register AddressPMAREGDATAIN[7:0] Register Data In (from FPGA to PMA register)PMAREGSTROBE Strobe Asserted LowPMAREGRW Read Asserted High/Write Asserted LowTXRUNDISP(1)(2) Register Data Out (from PMA register to FPGA)Notes:1. TXRUNDISP is the Register Data Out when PMAREGADDR[5] is asserted; otherwise, it indicates theTX running disparity.2. All read data must be inverted.