Xilinx Zynq-7000 Design Manual

Also see for Zynq-7000: Quick start guide Getting started guide User guide Application note User guide

Zynq-7000 PCB Design Guide www.xilinx.com 3UG933 (v1.8) November 7, 201412/04/2013 1.6 Changed “DDR3” to “DDR3/3L” throughout document. Updated capacitor quantitiesand packages in Table 3-1 and Table 3-2. Updated capacitor specifications inTable 3-3. Updated descriptions for V CCPINT – PS Internal Logic Supply and V CCPAUX –PS Auxiliary Logic Supply. Deleted “Capacitor Consolidation Rules” section. Modifiednext-to-last sentence under PS_DDR_VREF0, PS_DDR_VREF1 – PS DDR ReferenceVoltage. Added paragraph preceding Table 5-5 and updated Table 5-5. Updated Addr,Command, Contrl output name in Figure 5-7. Deleted last sentence under DDR TraceLength.08/01/2014 1.7 Removed “and Pin Planning Guide” from title. Added recommendation toRecommended PCB Capacitors per Device. Changed V CCO per Bank sub-heading from“100 μF” to 47 μF” in Table 3-1. Removed values for V CCPLL and replaced withreference (Note 3) in Table 3-2. Changed “Terminal” type to “Terminal Tantalum” andadded “X7U” to 100 μF capacitor in Table 3-3. Modified first paragraph under NoiseLimits by removing specifications and adding a reference to the data sheet. Updatedsecond paragraph under Unconnected V CCO Pins. Changed Murata part number from“GRM155R60J475ME47D” to “GRM155R60J474KE19” under Unconnected V CCO Pins.Updated first paragraph under PS_DDR_VRN, PS_DDR_VRP – PS DDR TerminationVoltage. Updated Unused DDR Memory. Deleted last two sentences under PS_POR_B– Power on Reset and last sentence under PS_SRST_B – External System Reset.Changed “Boot Mode Pins” section (pins MIO[2] to MIO[8] to Boot Mode Pin MIO[8].Modified Figure 5-5 (CKE resistor layout). Modified Figure 5-6 (changed clk signal todifferential signals CLK_P/CLK_N and added pull-down resistor to ODT). Addedseparate column for DDR3L to Table 5-6 and modified values. Clarified DDR TraceLength and DDR Trace Impedance sections. Clarified byte swapping under DDRRouting Topology. Added last paragraph under Ethernet GEM. Deleted “LowerOperating Frequencies (without Feedback Mode)” section from Chapter 6.08/05/2014 1.7.1 Updated document to latest user guide template.11/07/2014 1.8 Added XC7Z035 device to Table 3-1 and Table 3-2. Added 10 μF capacitor to Table 3-3.Updated Table 5-5.Date Version RevisionSend Feedback