DMA Channel DMA Controller Port Data0 0B0A0C005 D6D4C1016 D6D4C2027 D6D4C303Interrupt InitializationThis setup procedure is normally completed by the BIOS during initialization so thatno other activity is required. If modifications to the interrupt handler are required,this information together with the programming information provided by the hostsystem should be sufficient to properly set up the interrupt vectors.The host adapter will drive one of several interrupts in the AT system. The particu-lar interrupt used must be set up on power-up initialization and be properly man-aged during usage. A summary of the AT interrupts of interest to the host adapterdriver along with their corresponding vector locations follow. All of these interruptsare handled by a slave interrupt controller. The master controller handles all systeminterrupts such as keyboard, timer, etc. and is assumed to be correctly initialized toallow interrupts by the slave controller. Upon receiving an interrupt, the processorwill be vectored to the contents of the corresponding vector location.Hardware Interrupt Software Interrupt Vector Location (hex)IRQ 9 Int 71IRQ 10 Int 72IRQ 11 Int 73IRQ 12 Int 74IRQ 14 Int 76IRQ 15 Int 77NoteIRQ 13 is not one that is available on this board.The interrupt is initialized by clearing the corresponding interrupt mask bit in theslave controller. The mask register is a read/write register, and only the bit of inter-est should be cleared. The port address is A1h, and bit definitions follow:adaptec AHA-1740A/1742A/17445-32
