Table 10. DIMM installation sequence for non-mirroring (normal) mode (continued)Installed microprocessors DIMM connector population sequenceMicroprocessor socket 2 Install the DIMMs in the following sequence: 12, 15, 18, 11,14, 17, 10, 13, 16Memory mirroringMemory-mirroring mode replicates and stores data on two pairs of DIMMs withintwo channels simultaneously. If a failure occurs, the memory controller switchesfrom the primary pair of memory DIMMs to the backup pair of DIMMs. To enablememory mirroring through the Setup utility, select System Settings → Memory. Fordetails about enabling memory mirroring, see “Using the Setup utility” on page158. When you use the memory mirroring feature, consider the followinginformation:v When you use memory mirroring, you must install a pair of DIMMs at a time.One DIMM must be in channel 0, and the mirroring DIMM must be in the sameconnector in channel 1. The two DIMMs in each pair must be identical in size,type, rank (single, dual, or quad), and organization. They do not have to beidentical in speed. The channels run at the speed of the slowest DIMM in any ofthe channels. See Table 12 on page 120 for the DIMM connectors that are in eachpair.v Channel 2, DIMM connectors 7, 8, 9, 16, 17, and 18 are not used inmemory-mirroring mode.v The maximum available memory is reduced to half of the installed memorywhen memory mirroring is enabled. For example, if you install 64 GB ofmemory using RDIMMs, only 32 GB of addressable memory is available whenyou use memory mirroring.The following diagram shows the memory channel interface layout with theDIMM installation sequence for mirroring mode. The numbers within the boxesindicate the DIMM population sequence in pairs within the channels, and thenumbers next to the boxes indicate the DIMM connectors within the channels. Forexample, the following illustration shows the first pair of DIMMs (indicated byones (1) inside the boxes) should be installed in DIMM connectors 1 on channel 0and DIMM connector 2 on channel 1. DIMM connectors 3, 6, 9, 12, 15, and 18 onchannel 2 are not used in memory-mirroring mode.The following table lists the DIMM connectors on each memory channel.CH0CH1CH2CPU1112233362 15 48 7CH2CH0CH14461210 1115161413QPI5569 1817CPU2Figure 122. Memory channel interface layoutChapter 2. Installing optional devices 119
