25TK-860G/862G Wide/Narrow Changeover CircuitThe W/N port (pin 4) of the shift register (IC510) is usedto switch between ceramic filters. When the W/N port ishigh, Q4 turns on and the ceramic filter SW diode (D8, D10)CF1 turns on to receive a Narrow signal. At the same time,Q35 turns on and one of the filters is selected so that thewide and narrow audio output levels are equal.When the W/N port is low, Q3 turns on and the ceramicfilter SW diode (D8, D10) CF2 turns on to receive a Widesignal. AF Signal SystemThe detection signal (DEO) from the TX-RX unit goes tothe audio processor (IC508) of the control unit. The signalpasses through a filter in the audio processor to adjust thegain, and is output to IC507. IC507 sums the AF signal andthe DTMF signal, BEEP signal and returns the resulting sig-nal to the TX-RX unit. The signal (AFO) sent to the TX-RXunit is input to the D/A converter (IC6). The AFO output levelis adjusted by the D/A converter. The signal output from theD/A converter is input to the audio power amplifier (IC13).The AF signal from IC13 switches between the internalspeaker and speaker jack (J1) output. Squelch CircuitThe detection output from the FM IF IC (IC5) passesthrough a band-pass filter and a noise amplifier (Q10) in thecontrol unit to detect noise. A voltage is applied to the CPU(IC502). The CPU controls squelch according to the voltage(ASQ) level. The signal from the RSSI pin of IC5 is moni-tored. The electric field strength of the receive signal can beknown before the ASQ voltage is input to the CPU, and thescan stop speed is improved.FIg. 4 AF signal systemFig. 5 Squelch circuitCIRCUIT DESCRIPTIONFig. 3 Wide/Narrow changeover circuitCF1(Narrow)CF2(Wide)IFIMXOIC5IF systemAFODETOUTC70C72C53R19R23R46R32 R30R39R38++Q358RCQ37 R59W/NIC510 4pinWide : LNarrow : HC51D8 D10Q35CQ4Wide : HNarrow : LAUDIOPROCE.SUMAMPD/ACONV.IC508 IC507 IC6AF PAIC13 SPDTMFAFODEOCONTORL UNITQ10NOISE AMP D11IC4IC5 IC502AFRSSIBPF DETCPUIFSYSTEMCONTROL UNITASQRSSIPLL Frequency SynthesizerThe PLL circuit generates the first local oscillator signalfor reception and the RF signal for transmission. PLLThe frequency step of the PLL circuit is 5 or 6.25kHz. A16.8MHz reference oscillator signal is divided at IC3 by afixed counter to produce the 5 or 6.25kHz reference fre-quency. The voltage controlled oscillator (VCO) output sig-nal is buffer amplified by Q106 (Sub-unit), then divided in IC3by a dual-module programmable counter. The divided signalis compared in phase with the 5 or 6.25kHz reference signalin the phase comparator in IC3. The output signal from thephase comparator is filtered through a low-pass filter andpassed to the VCO to control the oscillator frequency. (SeeFig. 6) VCOThe TK-860G/862G has VCO in a Sub-unit (A1) housed ina solid shielded case and connected to the TX-RX unitthrough CN101.The operating frequency is generated by Q103 in trans-mit mode and Q101 in receive mode. The oscillator fre-quency is controlled by applying the VCO control voltage,obtained from the phase comparator, to the varactor diodes(D102 and D104 in transmit mode and D101 and D103 inreceive mode). The RX (ST) pin is set low in receive modecausing Q102 to turn Q103 off, and turn Q101 on. The RX(ST) pin is set low in transmit mode. The outputs from Q101and Q103 are amplified by Q106 and sent to the buffer am-plifiers.