112CHAPTER 5 CPU ARCHITECTURESP15 0SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0(3) Stack pointer (SP)This is a 16-bit register to hold the start address of the memory stack area. Only the internal high-speed RAMarea can be set as the stack area.Figure 5-9. Stack Pointer ConfigurationThe SP is decremented ahead of write (save) to the stack memory and is incremented after read (reset)from the stack memory.Each stack operation saves/resets data as shown in Figures 5-10 and 5-11.Caution Since RESET input makes SP contents indeterminate, be sure to initialize the SP beforeinstruction execution.Figure 5-10. Data to be Saved to Stack MemoryFigure 5-11. Data to be Reset from Stack MemoryInterrupt andBRK InstructionPSWPC15 to PC8PC15 to PC8PC7 to PC0Register Pair LowerSP SP _ 2SP _ 2Register Pair UpperCALL, CALLF, andCALLT InstructionPUSH rp InstructionSP _ 1SPSP SP _ 2SP _ 2SP _ 1SPPC7 to PC0SP _ 3SP _ 2SP _ 1SPSP SP _ 3RETI and RETBInstructionPSWPC15 to PC8PC15 to PC8PC7 to PC0Register Pair LowerSP SP + 2SPRegister Pair UpperRET InstructionPOP rp InstructionSP + 1PC7 to PC0SP SP + 2SPSP + 1SP + 2SPSP + 1SP SP + 3
