27LIST OF FIGURES (7/9)Figure No. Title Page19-21 Operation Timings when Using Busy & Strobe Control Option (BUSY0 = 0) ......................... 45219-22 Operation Timing of the Bit Slippage Detection Function through the Busy Signal(BUSY0 = 1) ................................................................................................................................ 45319-23 Automatic Data Transmit/Receive Interval ................................................................................ 45419-24 Operation Timing with Automatic Data Transmit/Receive Function Performedby Internal Clock ......................................................................................................................... 45520-1 Serial Interface Channel 2 Block Diagram ................................................................................ 45820-2 Baud Rate Generator Block Diagram ........................................................................................ 45920-3 Serial Operating Mode Register 2 Format ................................................................................ 46120-4 Asynchronous Serial Interface Mode Register Format ............................................................. 46220-5 Asynchronous Serial Interface Status Register Format ............................................................ 46420-6 Baud Rate Generator Control Register Format ........................................................................ 46520-7 Asynchronous Serial Interface Transmit/Receive Data Format ............................................... 47820-8 Asynchronous Serial Interface Transmission Completion Interrupt Request GenerationTiming .......................................................................................................................................... 48020-9 Asynchronous Serial Interface Reception Completion Interrupt Request GenerationTiming .......................................................................................................................................... 48120-10 Receive Error Timing .................................................................................................................. 48220-11 State of Receive Buffer Register (RXB) When Receive Operation is Stopped andWhether Interrupt Request (INTSR) is Generated or Not ........................................................ 48320-12 3-Wire Serial I/O Mode Timing .................................................................................................. 48920-13 Circuit of Switching in Transfer Bit Order .................................................................................. 49020-14 Receive Completion Interrupt Request Generation Timing (ISRM = 1) .................................. 49120-15 Period that Reading Receive Buffer Register is Prohibited ..................................................... 49221-1 Real-time Output Port Block Diagram ....................................................................................... 49521-2 Real-time Output Buffer Register Configuration ....................................................................... 49621-3 Port Mode Register 12 Format ................................................................................................... 49721-4 Real-time Output Port Mode Register Format .......................................................................... 49721-5 Real-time Output Port Control Register Format ........................................................................ 49822-1 Basic Configuration of Interrupt Function .................................................................................. 50222-2 Interrupt Request Flag Register Format .................................................................................... 50522-3 Interrupt Mask Flag Register Format ......................................................................................... 50622-4 Priority Specify Flag Register Format ........................................................................................ 50722-5 External Interrupt Mode Register 0 Format ............................................................................... 50822-6 External Interrupt Mode Register 1 Format ............................................................................... 50922-7 Sampling Clock Select Register Format .................................................................................... 51022-8 Noise Eliminator Input/Output Timing (during Rising Edge Detection) .................................... 51122-9 Program Status Word Format .................................................................................................... 51222-10 Flowchart from Non-Maskable Interrupt Generation to Acknowledge ..................................... 51422-11 Non-Maskable Interrupt Request Acknowledge Timing ............................................................ 51422-12 Non-Maskable Interrupt Request Acknowledge Operation ....................................................... 515
