481CHAPTER 20 SERIAL INTERFACE CHANNEL 2(d) ReceptionWhen the RXE bit of the asynchronous serial interface mode register (ASIM) is set (1), a receiveoperation is enabled and sampling of the RxD pin input is performed.RxD pin input sampling is performed using the serial clock specified by ASIM.When the RxD pin input becomes low, the 5-bit counter of baud rate generaor (see Figure 20-2) startscounting, and at the time when the half time determined by specified baud rate has passed, the datasampling start timing signal is output. If the RxD pin input sampled again as a result of this start timingsignal is low, it is identified as a start bit, the 5-bit counter is initialized and starts counting, and datasampling is performed. When character data, a parity bit and one stop bit are detected after the startbit, reception of one frame of data ends.When one frame of data has been received, the receive data in the shift register is transferred to thereceive buffer register (RXB), and a reception completion interrupt request (INTSR) is generated.If an error is generated, the receive data in which the error was generated is still transferred to RXB.When an error is generated, if bit 1 (ISRM) of ASIM is cleared to 0, INTSR is generated.If ISRM bit is set to 1, INTSR is not generated.If the RXE bit is reset (0) during the receive operation, the receive operation is stopped immediately.In this case, the contents of RXB and ASIS are not changed, and INTSR and INTSER are not generated.Figure 20-9. Asynchronous Serial Interface Reception Completion Interrupt Request Generation TimingCaution The receive buffer register (RXB) must be read even if a receive error is generated. IfRXB is not read, an overrun error will be generated when the next data is received, andthe receive error state will continue indefinitely.D1 D2 D6 D7 ParityD0RxD (Input)INTSRSTOPSTART
