DESCRIPTION OF INSTRUCTIONS365105. XCHD A, @Rr (Exchange low nibbles of indirect address with accumulator)1 1 0 1 0 1 1 r7 0Instruction codeOperationNumber of bytesNumber of cyclesFlags(PSW)DescriptionExample XCHD A, @R0Instruction code: Byte 1(A0~3)←→((Rr0~3 )) r=0 or 1:C AC F0 RS1 RS0 OV F1 P•:::The lower order bits (0 thru 3) of the accumulator contents areexchanged with contents of the lower order bits (0 thru 3) of thedata memory location addressed by the register r contents. Theflag is updated.:1 1 0 1 0 1 1 07 0Byte 1Accumulator1 1 1 1 0 1 1 07 011Before executionAccumulator1 1 1 1 1 1 0 17 0After execution:Register 00 1 1 0 0 0 0 07 0Register 00 1 1 0 0 0 0 07 060H0 0 0 0 1 1 0 17 060H0 0 0 0 0 1 1 07 0
