Xilinx 7 Series User Manual

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Xilinx 7 Series User Manual Manual pdf 150 page image

150 www.xilinx.com 7 Series FPGAs GTP Transceivers User GuideUG482 (v1.9) December 19, 2016Chapter 4: Receiver2. The sequence of events in Figure 4-19 is not drawn to scale.3. To change RXRATE, a DRP write must be issued to the GTPE2_CHANNEL primitive,DRPADDR 9'h011, set bit[11] to 1'b0.a. To ensure only bit[11] of DRPADDR 9'h011 is modified, a read-modify-write functionmust be performed.4. Upon DRP write completion, the value of RXRATE must be changed to the new desired setting.5. Wait for RXPMARESETDONE to be detected low.6. Issue DRP write to the GTPE2_CHANNEL primitive, DRPADDR 9'h011, restoring theoriginal setting for bit[11]. The completion of this DRP write must occur beforeRXPMARESETDONE switches from low to high. RXPMARESETDONE will stay low for aminimum of 0.66 μs.7. This sequence will simulate correctly if SIM_RESET_SPEEDUP is set to FALSE. IfSIM_RESET_SPEEDUP is set to TRUE, this sequence should be bypassed.RX Margin AnalysisFunctional DescriptionAs line rates and channel attenuation increase, the receiver equalizers are more often enabled toovercome channel attenuation. This poses a challenge to system bring-up because the quality of thelink cannot be determined by measuring the far-end eye opening at the receiver pins. At high linerates, the received eye measured on the printed circuit board can appear to be completely closedeven though the internal eye after the receiver equalizer is open.The 7 series FPGAs GTP transceivers RX eye scan provides a mechanism to measure and visualizethe receiver eye margin after the equalizer. Additional use modes enable several other methods todetermine and diagnose the effects of equalization settings.X-Ref Target - Figure 4-20Figure 4-20: Offset Sample and Data Sample to Calculate BER as a Function of Offset—the Statistical EyeUG482_c4_09_110911Send Feedback