Xilinx 7 Series User Manual

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7 Series FPGAs GTP Transceivers User Guide www.xilinx.com UG482 (v1.9) December 19, 2016DISCLAIMERThe information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximumextent permitted by applicable law: (1) Materials are made available “AS IS” and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIESAND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, includingnegligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under, or in connection with,the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage(including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if suchdamage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. Xilinx assumes no obligation to correctany errors contained in the Materials or to notify you of updates to the Materials or to product specifications. You may not reproduce,modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and conditionsof Xilinx’s limited warranty, please refer to Xilinx’s Terms of Sale which can be viewed at http://www.xilinx.com/legal.htm#tos; IP cores may besubject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to befail-safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in suchcritical applications, please refer to Xilinx’s Terms of Sale which can be viewed at http://www.xilinx.com/legal.htm#tos.AUTOMOTIVE APPLICATIONS DISCLAIMERAUTOMOTIVE PRODUCTS (IDENTIFIED AS "XA" IN THE PART NUMBER) ARE NOT WARRANTED FOR USE IN THE DEPLOYMENT OF AIRBAGSOR FOR USE IN APPLICATIONS THAT AFFECT CONTROL OF A VEHICLE ("SAFETY APPLICATION") UNLESS THERE IS A SAFETY CONCEPT ORREDUNDANCY FEATURE CONSISTENT WITH THE ISO 26262 AUTOMOTIVE SAFETY STANDARD ("SAFETY DESIGN"). CUSTOMER SHALL,PRIOR TO USING OR DISTRIBUTING ANY SYSTEMS THAT INCORPORATE PRODUCTS, THOROUGHLY TEST SUCH SYSTEMS FOR SAFETYPURPOSES. USE OF PRODUCTS IN A SAFETY APPLICATION WITHOUT A SAFETY DESIGN IS FULLY AT THE RISK OF CUSTOMER, SUBJECT ONLYTO APPLICABLE LAWS AND REGULATIONS GOVERNING LIMITATIONS ON PRODUCT LIABILITY.© Copyright 2012–2016 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brandsincluded herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respectiveowners.Revision HistoryThe following table shows the revision history for this document.Date Version Revision01/03/2012 1.0 Initial Xilinx release.02/21/2012 1.1 Changed “N” factor to “N1” and “N2”factors in Figure 2-10, Equation 2-1, and Table 2-7.Revised Figure A-4, Figure A-6, Table B-1, Table D-1, and Table D-2.01/01/2012 1.1.1 Made typographical edits.09/06/2012 1.2 Updated the second, third, and fourth paragraphs under Overview and Features in Chapter 1.Updated description of PLL0_FBDIV/PLL1_FBDIV and added PLL0_FBDIV_45/PLL0_FBDIV_45 attributes to Table 2-9. Added Reset and Initialization and Power Down inChapter 2. Updated Note 1 relevant to Figure 3-2 through Figure 3-5. Updated descriptions ofTXSTARTSEQ and GEARBOX_MODE attributes in Table 3-9. Updated controller port clockdomains and descriptions in Table 3-26. Updated TXPI_SYNFREQ_PPM[2:0] andTXPI_GREY_SEL attribute descriptions in Table 3-27. Updated first introductory paragraphunder TX Gearbox Operating Modes in Chapter 3. Deleted Internal Sequence Counter OperatingMode section in Chapter 3, Transmitter. Added USE_PCS_CLK_PHASE_SEL andES_CLK_PHASE_SE attributes to Table 4-20. Added second and third paragraphs underAlignment Status Signals in Chapter 4. Added last sentence to description ofRXBYTEISALIGNED port in Table 4-25. Added COMMA_ALIGN_LATENCY attribute toTable 4-26. Updated description of GEARBOX_MODE attribute in Table 4-42. AddedChapter 5, Board Design Guidelines. Updated all package drawings in Appendix A, PlacementInformation by Package. Updated Table B-1.