Xilinx 7 Series User Manual

Also see for 7 Series: User guide User guide User guide User guide

Contents

Xilinx 7 Series User Manual Manual pdf 217 page image

7 Series FPGAs GTP Transceivers User Guide www.xilinx.com 217UG482 (v1.9) December 19, 2016Chapter 5Board Design GuidelinesOverviewTopics related to implementing a design on a printed circuit board using the 7 series Artix™-7FPGA GTP transceivers are presented in this chapter. The GTP transceivers are analog circuits thatrequire special consideration and attention when designing and implementing them on a printedcircuit board. Besides an understanding of the functionality of the device pins, a design thatperforms optimally requires attention to issues such as device interfacing, transmission lineimpedance and routing, power supply design filtering and distribution, component selection, andPCB layout and stackup design.Pin Description and Design GuidelinesGTP Pin DescriptionsTable 5-1: GTP Quad Pin DescriptionsPins Direction DescriptionMGTREFCLK0PMGTREFCLK0In (Pad) Differential clock input pin pair for the reference clock of the GTP transceiverQuad.MGTREFCLK1PMGTREFCLK1NIn (Pad) Differential clock input pin pair for the reference clock of the GTP transceiverQuad.MGTPRXP0/MGTPRXN0MGTPRXP1/MGTPRXN1MGTPRXP2/MGTPRXN2MGTPRXP3/MGTPRXN3In (Pad) RXP and RXN are the differential input pairs for each of the receivers in theGTP transceiver Quad.MGTTXP0/MGTPTXN0MGTTXP1/MGTPTXN1MGTTXP2/MGTPTXN2MGTTXP3/MGTPTXN3Out (Pad) TXP and TXN are the differential output pairs for each of the transmitters inthe GTP transceiver Quad.MGTRREF In (Pad) Calibration resistor input pin for the termination resistor calibration circuit.Connect to a 100Ω resistor that is also connected to MGTAVTT.Send Feedback