Xilinx RocketIO User Manual

Also see for RocketIO: User guide User guide User guide

Contents

Xilinx RocketIO User Manual Manual pdf 109 page image

RocketIO™ Transceiver User Guide www.xilinx.com 109UG024 (v2.3.2) June 24, 2004 1-800-255-7778PCB Design Requirements RPassive FilteringTo achieve the necessary isolation from high-frequency power supply noise, passive filter networksare required on the power supply pins. Figure 3-8 illustrates the difference in power filteringnetworks between a device that does contain capacitors (Internal) and a device that does not containcapacitors (External).Each transceiver power pin requires one capacitor and one ferrite bead. The capacitors must be ofvalue 0.22 μF in an 0603 (EIA) SMT package of X7R dielectric material at 10% tolerance, rated toat least 5 V. The ferrite bead is the Murata BLM18AG102SN1. These components may not beshared among multiple RocketIO power supply pins under any circumstances.Many of the Virtex-II Pro devices have power filtering capacitors incorporated into the package toreduce component count on the PCB and improve the effectiveness of these capacitors. Table 3-6outlines which device/package combinations have 0.22 μF capacitors internal to the package andwhich devices do not. External ferrite beads must be used in all cases, as ferrite beads are notincluded inside the package in any device. Table boxes labeled “External” denote a device for whichthe user must provide power filtering capacitors externally on the PCB; those labeled “Internal”denote a device that contains all necessary 0.22 μF capacitors for RocketIO power pins. Table boxesthat say “No MGTs” denote a device that does not have any RocketIO transceivers.Figure 3-8: Power Filtering Network on Devices with Internal and External Capacitors2.5 VAVCCAUXTXAVCCAUXRXVTTXVTRXVTTVTR2.5 VAVCCAUXTXAVCCAUXRXVTTXVTRXVTTVTRDevice with in-package capacitors Device without in-package capacitorsGNDAGNDAUG024_48_021704